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authorAndrey Petrov <anpetrov@fb.com>2019-11-11 14:27:54 -0800
committerPatrick Georgi <pgeorgi@google.com>2020-06-24 11:53:44 +0000
commitdf7e1f9a4345ed4a3db30a8efedea628f3f9fa18 (patch)
tree20306b6762d1d775aa13d0278ac9124044a73e71
parent674a825cd7477fc4339ba9b39a676e1a57dfa93c (diff)
downloadcoreboot-df7e1f9a4345ed4a3db30a8efedea628f3f9fa18.tar.gz
soc/intel/fsp_broadwell_de: Check if memory is 'locked'
Under certain conditions TXT can "lock" memory controller for security purpose. This manifests itself in IMC's SMbus controller failing all SPD data read requests. FSP does not detect error condition and fails boot with "No memory found" issue. TEST=tested on OCP monolake in 'locked' state Change-Id: If4637e4293421794a89037ff107e87794c40114a Signed-off-by: Andrey Petrov <anpetrov@fb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42710 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Christian Walter <christian.walter@9elements.com>
-rw-r--r--src/soc/intel/fsp_broadwell_de/include/soc/memory.h4
-rw-r--r--src/soc/intel/fsp_broadwell_de/include/soc/msr.h5
-rw-r--r--src/soc/intel/fsp_broadwell_de/romstage/memory.c8
3 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/memory.h b/src/soc/intel/fsp_broadwell_de/include/soc/memory.h
index 3bdba2ef56..494ca34da1 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/memory.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/memory.h
@@ -27,4 +27,8 @@
void save_dimm_info(void);
+/* Determine if memory configuration has been locked by TXT */
+bool memory_config_is_locked(void);
+
+
#endif
diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/msr.h b/src/soc/intel/fsp_broadwell_de/include/soc/msr.h
index f9fdffb2bf..2bbcf23687 100644
--- a/src/soc/intel/fsp_broadwell_de/include/soc/msr.h
+++ b/src/soc/intel/fsp_broadwell_de/include/soc/msr.h
@@ -39,4 +39,9 @@
#define MSR_PRMRR_PHYS_BASE 0x1f4
#define MSR_PRMRR_PHYS_MASK 0x1f5
+/* EDS vol 2 */
+#define MSR_LT_MEMORY_LOCKED 0x2e7
+#define MSR_MEM_LOCK_BIT1 (1 << 1)
+#define MSR_MEM_LOCK_BIT2 (1 << 2)
+
#endif /* _SOC_MSR_H_ */
diff --git a/src/soc/intel/fsp_broadwell_de/romstage/memory.c b/src/soc/intel/fsp_broadwell_de/romstage/memory.c
index b4bc097e84..571ab091ab 100644
--- a/src/soc/intel/fsp_broadwell_de/romstage/memory.c
+++ b/src/soc/intel/fsp_broadwell_de/romstage/memory.c
@@ -13,6 +13,8 @@
* GNU General Public License for more details.
*/
+#include <cpu/x86/msr.h>
+#include <soc/msr.h>
#include <stddef.h>
#include <device/pci_ops.h>
#include <device/dram/ddr4.h>
@@ -85,3 +87,9 @@ void save_dimm_info(void)
}
}
}
+
+bool memory_config_is_locked(void)
+{
+ msr_t msr = rdmsr(MSR_LT_MEMORY_LOCKED);
+ return (msr.lo & (MSR_MEM_LOCK_BIT1 | MSR_MEM_LOCK_BIT2));
+}