diff options
| author | Yuchen Huang <yuchen.huang@mediatek.corp-partner.google.com> | 2021-04-11 15:28:20 +0800 |
|---|---|---|
| committer | Hung-Te Lin <hungte@chromium.org> | 2021-05-10 01:57:49 +0000 |
| commit | 6a6e58cb4197b96f8363a000a66ca54fc3344ddd (patch) | |
| tree | ca8f82cbf45a90becb4358331552d66c142349c2 | |
| parent | 24c6355741e9f68fb2304be0dcdadfb25570b787 (diff) | |
| download | coreboot-6a6e58cb4197b96f8363a000a66ca54fc3344ddd.tar.gz | |
soc/mediatek/mt8195: Add clk_buf driver
Both mt8192 and mt8195 use mt6359p clk_buf.
But mt8195 clk_buf uses legacy co-clock mode without srclken_rc.
Signed-off-by: Yuchen Huang <yuchen.huang@mediatek.corp-partner.google.com>
Change-Id: Ie9ee91449a7a14e77231493f807b321b2dbaa6a6
Signed-off-by: Yidi Lin <yidi.lin@mediatek.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/53896
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Yu-Ping Wu <yupingso@google.com>
| -rw-r--r-- | src/mainboard/google/cherry/romstage.c | 2 | ||||
| -rw-r--r-- | src/soc/mediatek/common/clkbuf.c (renamed from src/soc/mediatek/mt8192/clkbuf.c) | 3 | ||||
| -rw-r--r-- | src/soc/mediatek/common/include/soc/clkbuf.h (renamed from src/soc/mediatek/mt8192/include/soc/clkbuf.h) | 6 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8192/Makefile.inc | 2 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8195/Makefile.inc | 1 |
5 files changed, 9 insertions, 5 deletions
diff --git a/src/mainboard/google/cherry/romstage.c b/src/mainboard/google/cherry/romstage.c index cba599596c..f4bb1ca27b 100644 --- a/src/mainboard/google/cherry/romstage.c +++ b/src/mainboard/google/cherry/romstage.c @@ -1,6 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <arch/stages.h> +#include <soc/clkbuf.h> #include <soc/mt6315.h> #include <soc/mt6359p.h> #include <soc/pmif.h> @@ -10,4 +11,5 @@ void platform_romstage_main(void) mtk_pmif_init(); mt6359p_init(); mt6315_init(); + clk_buf_init(); } diff --git a/src/soc/mediatek/mt8192/clkbuf.c b/src/soc/mediatek/common/clkbuf.c index 83fdb92067..735457122f 100644 --- a/src/soc/mediatek/mt8192/clkbuf.c +++ b/src/soc/mediatek/common/clkbuf.c @@ -5,8 +5,9 @@ #include <device/mmio.h> #include <soc/clkbuf.h> #include <soc/pmif.h> +#if CONFIG(SRCLKEN_RC_SUPPORT) #include <soc/srclken_rc.h> - +#endif #define BUFTAG "[CLKBUF]" #define buf_info(fmt, arg ...) printk(BIOS_INFO, BUFTAG "%s,%d: " fmt, \ diff --git a/src/soc/mediatek/mt8192/include/soc/clkbuf.h b/src/soc/mediatek/common/include/soc/clkbuf.h index b5fa3a3f1b..d9bad06607 100644 --- a/src/soc/mediatek/mt8192/include/soc/clkbuf.h +++ b/src/soc/mediatek/common/include/soc/clkbuf.h @@ -1,7 +1,7 @@ /* SPDX-License-Identifier: GPL-2.0-only */ -#ifndef SOC_MEDIATEK_MT8192_CLKBUF_H -#define SOC_MEDIATEK_MT8192_CLKBUF_H +#ifndef SOC_MEDIATEK_COMMON_CLKBUF_H +#define SOC_MEDIATEK_COMMON_CLKBUF_H #include <device/mmio.h> @@ -66,4 +66,4 @@ DEFINE_BITFIELD(PMIC_RG_XO_VOTE, 10, 0) int clk_buf_init(void); -#endif /* SOC_MEDIATEK_MT8192_CLKBUF_H */ +#endif /* SOC_MEDIATEK_COMMON_CLKBUF_H */ diff --git a/src/soc/mediatek/mt8192/Makefile.inc b/src/soc/mediatek/mt8192/Makefile.inc index e2abc5ef25..484cfb8e21 100644 --- a/src/soc/mediatek/mt8192/Makefile.inc +++ b/src/soc/mediatek/mt8192/Makefile.inc @@ -23,7 +23,7 @@ verstage-y += ../common/uart.c romstage-y += ../common/auxadc.c romstage-y += ../common/cbmem.c -romstage-y += clkbuf.c srclken_rc.c +romstage-y += ../common/clkbuf.c srclken_rc.c romstage-y += ../common/dram_init.c romstage-y += ../common/dramc_param.c romstage-y += ../common/flash_controller.c diff --git a/src/soc/mediatek/mt8195/Makefile.inc b/src/soc/mediatek/mt8195/Makefile.inc index c344849702..cc855b2b81 100644 --- a/src/soc/mediatek/mt8195/Makefile.inc +++ b/src/soc/mediatek/mt8195/Makefile.inc @@ -20,6 +20,7 @@ verstage-y += ../common/uart.c verstage-y += ../common/wdt.c romstage-y += ../common/cbmem.c +romstage-y += ../common/clkbuf.c romstage-y += emi.c romstage-y += ../common/flash_controller.c romstage-y += ../common/gpio.c gpio.c |