From 3cf05b58e5a675c0dd7efd57ab0ae082279f4e55 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Mon, 15 May 2023 19:16:22 +0200 Subject: soc/amd/*/Kconfig: change ACPI_CPU_STRING to use hexadecimal CPU numbers MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Both the AMD AGESA reference code and the default coreboot ACPI_CPU_STRING use hexadecimal numbers in the ACPI CPU object names, so change the ACPI_CPU_STRING format string in the both the Stoneyridge Kconfig and the common non-CAR AMD SoC config Kconfig which covers all other AMD SoCs in soc/amd. All platforms where the P state and C state SSDT from binaryPI (Stoneyridge) or FSP (Picasso) was used in coreboot before it got replaced by native code, had at most 8 cores/threads, so the mismatch never became apparent. Signed-off-by: Felix Held Change-Id: I9d6822c5df01786ee541ce90734b75ed1a761fca Reviewed-on: https://review.coreboot.org/c/coreboot/+/75250 Reviewed-by: Kyösti Mälkki Reviewed-by: Fred Reitberger Reviewed-by: Matt DeVillier Tested-by: build bot (Jenkins) --- src/soc/amd/common/block/cpu/Kconfig | 2 +- src/soc/amd/stoneyridge/Kconfig | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/amd/common/block/cpu/Kconfig b/src/soc/amd/common/block/cpu/Kconfig index 857c8cba53..03a3b7295b 100644 --- a/src/soc/amd/common/block/cpu/Kconfig +++ b/src/soc/amd/common/block/cpu/Kconfig @@ -35,7 +35,7 @@ config CBFS_CACHE_SIZE config ACPI_CPU_STRING string - default "C%03d" + default "C%03X" endif # SOC_AMD_COMMON_BLOCK_NONCAR diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index f57111d863..1e35d766af 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -268,7 +268,7 @@ config SMM_MODULE_STACK_SIZE config ACPI_CPU_STRING string - default "P%03d" + default "P%03X" config ACPI_SSDT_PSD_INDEPENDENT default n -- cgit v1.2.1