From 8b22c558554c3722cbd809fac132a5ca46451280 Mon Sep 17 00:00:00 2001 From: Jonathan Zhang Date: Mon, 22 Mar 2021 16:12:05 -0700 Subject: soc/intel/fsp_broadwell_de: Add definition for LGMR Add definition for LPC Generic Memory Range register. Signed-off-by: Jonathan Zhang Change-Id: I7c76bacdf692e72849547106f29b614345f505c1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/51716 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/soc/intel/fsp_broadwell_de/include/soc/lpc.h | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h b/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h index 3f9c2024f7..01e5a5b28d 100644 --- a/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h +++ b/src/soc/intel/fsp_broadwell_de/include/soc/lpc.h @@ -37,6 +37,7 @@ #define LPC_GEN2_DEC 0x88 #define LPC_GEN3_DEC 0x8c #define LPC_GEN4_DEC 0x90 +#define LGMR 0x98 /* LPC Generic Memory Range */ #define GEN_PMCON_1 0xA0 #define SMI_LOCK (1 << 4) #define SMI_LOCK_GP6 (1 << 5) -- cgit v1.2.1