From ad8a2a475e2733fd4958f816178040153e8cefd3 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Sat, 5 Feb 2022 00:21:49 +0100 Subject: drivers/uart/uart8250reg.h: use shifts in constants The UART8250_FCR_TRIGGER bits are bits 6 and 7 in the register, so rewrite the mask and constants as constants shifted by 6. Signed-off-by: Felix Held Change-Id: I0663c1a641355b7bfb59f41479d17117178fb895 Reviewed-on: https://review.coreboot.org/c/coreboot/+/61644 Tested-by: build bot (Jenkins) Reviewed-by: HAOUAS Elyes --- src/drivers/uart/uart8250reg.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/src/drivers/uart/uart8250reg.h b/src/drivers/uart/uart8250reg.h index 170c90eee9..35a6845554 100644 --- a/src/drivers/uart/uart8250reg.h +++ b/src/drivers/uart/uart8250reg.h @@ -30,11 +30,11 @@ #define UART8250_FCR_CLEAR_RCVR BIT(1) /* Clear the RCVR FIFO */ #define UART8250_FCR_CLEAR_XMIT BIT(2) /* Clear the XMIT FIFO */ #define UART8250_FCR_DMA_SELECT BIT(3) /* For DMA applications */ -#define UART8250_FCR_TRIGGER_MASK 0xC0 /* Mask for the FIFO trigger range */ -#define UART8250_FCR_TRIGGER_1 0x00 /* Mask for trigger set at 1 */ -#define UART8250_FCR_TRIGGER_4 0x40 /* Mask for trigger set at 4 */ -#define UART8250_FCR_TRIGGER_8 0x80 /* Mask for trigger set at 8 */ -#define UART8250_FCR_TRIGGER_14 0xC0 /* Mask for trigger set at 14 */ +#define UART8250_FCR_TRIGGER_MASK (3 << 6) /* Mask for the FIFO trigger range */ +#define UART8250_FCR_TRIGGER_1 (0 << 6) /* Mask for trigger set at 1 */ +#define UART8250_FCR_TRIGGER_4 (1 << 6) /* Mask for trigger set at 4 */ +#define UART8250_FCR_TRIGGER_8 (2 << 6) /* Mask for trigger set at 8 */ +#define UART8250_FCR_TRIGGER_14 (3 << 6) /* Mask for trigger set at 14 */ #define UART8250_LCR 0x03 #define UART8250_LCR_WLS_MSK 0x03 /* character length select mask */ -- cgit v1.2.1