From 7c66d39a0b94e894a56453e0624e976bbbec8850 Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Thu, 2 Feb 2023 17:23:46 -0700 Subject: soc/amd: Use common reset code for PCO SoC This switches the Picasso SoC to use the common reset code. Picasso supports warm resets, so set the SOC_AMD_SUPPORTS_WARM_RESET flag. Signed-off-by: Martin Roth Change-Id: I52515b20ef6c70b137f176d95480757b16bd8735 Reviewed-on: https://review.coreboot.org/c/coreboot/+/72755 Reviewed-by: Felix Held Tested-by: build bot (Jenkins) --- src/soc/amd/picasso/Kconfig | 2 ++ 1 file changed, 2 insertions(+) (limited to 'src/soc/amd/picasso/Kconfig') diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig index a0254e98d3..d34b2ab444 100644 --- a/src/soc/amd/picasso/Kconfig +++ b/src/soc/amd/picasso/Kconfig @@ -50,6 +50,7 @@ config SOC_AMD_PICASSO select SOC_AMD_COMMON_BLOCK_PM select SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE select SOC_AMD_COMMON_BLOCK_PSP_GEN2 + select SOC_AMD_COMMON_BLOCK_RESET select SOC_AMD_COMMON_BLOCK_SATA select SOC_AMD_COMMON_BLOCK_SMBUS select SOC_AMD_COMMON_BLOCK_SMI @@ -61,6 +62,7 @@ config SOC_AMD_PICASSO select SOC_AMD_COMMON_BLOCK_UART select SOC_AMD_COMMON_BLOCK_UCODE select SOC_AMD_COMMON_FSP_DMI_TABLES + select SOC_AMD_SUPPORTS_WARM_RESET select SSE2 select UDK_2017_BINDING select USE_DDR4 -- cgit v1.2.1