From b32968f56d7b8ca79fe69c70a4a75e6fdef9a7f8 Mon Sep 17 00:00:00 2001
From: weidai <weidai@57ff6487-cd31-0410-9ec3-f628ee90f5f0>
Date: Mon, 16 Apr 2007 00:45:21 +0000
Subject: MASM code for x64

git-svn-id: svn://svn.code.sf.net/p/cryptopp/code/trunk/c5@322 57ff6487-cd31-0410-9ec3-f628ee90f5f0
---
 x64masm.asm | 83 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 83 insertions(+)
 create mode 100755 x64masm.asm

(limited to 'x64masm.asm')

diff --git a/x64masm.asm b/x64masm.asm
new file mode 100755
index 0000000..4102c6a
--- /dev/null
+++ b/x64masm.asm
@@ -0,0 +1,83 @@
+PUBLIC Baseline_Add
+PUBLIC Baseline_Sub
+.CODE
+       ALIGN     8
+Baseline_Add	PROC
+
+	lea		rdx, [rdx+8*rcx]
+	lea		r8, [r8+8*rcx]
+	lea		r9, [r9+8*rcx]
+
+	neg		rcx					; rcx is negative index
+	test	rcx, 2				; this clears carry flag
+	jz		$0@Baseline_Add
+	sub		rcx, 2
+	jmp		$1@Baseline_Add
+
+$0@Baseline_Add:
+	jrcxz	$2@Baseline_Add		; loop until rcx overflows and becomes zero
+	mov		rax,[r8+8*rcx]
+	adc		rax,[r9+8*rcx]
+	mov		[rdx+8*rcx],rax
+	mov		rax,[r8+8*rcx+8]
+	adc		rax,[r9+8*rcx+8]
+	mov		[rdx+8*rcx+8],rax
+$1@Baseline_Add:
+	mov		rax,[r8+8*rcx+16]
+	adc		rax,[r9+8*rcx+16]
+	mov		[rdx+8*rcx+16],rax
+	mov		rax,[r8+8*rcx+24]
+	adc		rax,[r9+8*rcx+24]
+	mov		[rdx+8*rcx+24],rax
+
+	lea		rcx,[rcx+4]			; advance index, avoid inc which causes slowdown on Intel Core 2
+	jmp		$0@Baseline_Add
+
+$2@Baseline_Add:
+	mov		rax, 0
+	setc	al					; store carry into rax (return result register)
+
+	ret
+Baseline_Add ENDP
+
+       ALIGN     8
+Baseline_Sub	PROC
+
+	lea		rdx, [rdx+8*rcx]
+	lea		r8, [r8+8*rcx]
+	lea		r9, [r9+8*rcx]
+
+	neg		rcx					; rcx is negative index
+	test	rcx, 2				; this clears carry flag
+	jz		$0@Baseline_Sub
+	sub		rcx, 2
+	jmp		$1@Baseline_Sub
+
+$0@Baseline_Sub:
+	jrcxz	$2@Baseline_Sub		; loop until rcx overflows and becomes zero
+	mov		rax,[r8+8*rcx]
+	sbb		rax,[r9+8*rcx]
+	mov		[rdx+8*rcx],rax
+	mov		rax,[r8+8*rcx+8]
+	sbb		rax,[r9+8*rcx+8]
+	mov		[rdx+8*rcx+8],rax
+$1@Baseline_Sub:
+	mov		rax,[r8+8*rcx+16]
+	sbb		rax,[r9+8*rcx+16]
+	mov		[rdx+8*rcx+16],rax
+	mov		rax,[r8+8*rcx+24]
+	sbb		rax,[r9+8*rcx+24]
+	mov		[rdx+8*rcx+24],rax
+
+	lea		rcx,[rcx+4]			; advance index, avoid inc which causes slowdown on Intel Core 2
+	jmp		$0@Baseline_Sub
+
+$2@Baseline_Sub:
+	mov		rax, 0
+	setc	al					; store carry into rax (return result register)
+
+	ret
+Baseline_Sub ENDP
+
+_TEXT ENDS
+END
-- 
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