diff options
| author | Dave Airlie <airlied@linux.ie> | 2005-09-25 08:54:31 +0000 |
|---|---|---|
| committer | Dave Airlie <airlied@linux.ie> | 2005-09-25 08:54:31 +0000 |
| commit | d4dec1db808095f42b6fd776b2582c6f27bebb9a (patch) | |
| tree | b58444776fe5eb4427a62f16b31902143711fe7e | |
| parent | c1b7df95be1194efcfd0d9ffd63da1ce27272565 (diff) | |
| download | drm-d4dec1db808095f42b6fd776b2582c6f27bebb9a.tar.gz | |
hopefully fix server recycling on PCIE
| -rw-r--r-- | shared-core/radeon_cp.c | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/shared-core/radeon_cp.c b/shared-core/radeon_cp.c index 1bd8e33c..655803e4 100644 --- a/shared-core/radeon_cp.c +++ b/shared-core/radeon_cp.c @@ -1258,14 +1258,14 @@ static void radeon_set_pciegart(drm_radeon_private_t * dev_priv, int on) RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, RADEON_PCIE_TX_GART_EN); } else { - RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, tmp & ~RADEON_PCIE_TX_GART_EN); + RADEON_WRITE_PCIE(RADEON_PCIE_TX_GART_CNTL, (tmp & ~RADEON_PCIE_TX_GART_EN) | RADEON_PCIE_TX_GART_INVALIDATE_TLB); } } /* Enable or disable PCI GART on the chip */ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on) { - u32 tmp = RADEON_READ(RADEON_AIC_CNTL); + u32 tmp; if (dev_priv->flags & CHIP_IS_PCIE) { @@ -1273,6 +1273,8 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on) return; } + tmp = RADEON_READ(RADEON_AIC_CNTL); + if (on) { RADEON_WRITE(RADEON_AIC_CNTL, tmp | RADEON_PCIGART_TRANSLATE_EN); @@ -1596,9 +1598,13 @@ static int radeon_do_cleanup_cp(drm_device_t * dev) } else #endif { - if (dev_priv->gart_info.bus_addr) + + if (dev_priv->gart_info.bus_addr) { + /* Turn off PCI GART */ + radeon_set_pcigart(dev_priv, 0); if (!drm_ati_pcigart_cleanup(dev, &dev_priv->gart_info)) DRM_ERROR("failed to cleanup PCI GART!\n"); + } if (dev_priv->gart_info.gart_table_location == DRM_ATI_GART_FB) { |