diff options
| author | Patrice Mandin <pmandin@caramail.com> | 2007-01-26 19:54:35 +0100 |
|---|---|---|
| committer | Patrice Mandin <pmandin@caramail.com> | 2007-01-26 19:54:35 +0100 |
| commit | 5534c90ff39bf2bd41daca024d5b19889e78b1a0 (patch) | |
| tree | 54b1d8dd960da028ecfae527d5f0148b66308b1f | |
| parent | 05d3ed472e6ab5cfa7741e523bdb3992591ecc7e (diff) | |
| download | drm-5534c90ff39bf2bd41daca024d5b19889e78b1a0.tar.gz | |
nouveau: read gpu type once
| -rw-r--r-- | shared-core/nv10_graph.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/shared-core/nv10_graph.c b/shared-core/nv10_graph.c index 9a04bd86..b67122af 100644 --- a/shared-core/nv10_graph.c +++ b/shared-core/nv10_graph.c @@ -532,7 +532,7 @@ static int nv17_graph_ctx_regs [] = { void nouveau_nv10_context_switch(drm_device_t *dev) { drm_nouveau_private_t *dev_priv = dev->dev_private; - int channel, channel_old, i; + int channel, channel_old, i, gpu_type; channel=NV_READ(NV_PFIFO_CACH1_PSH1)&(nouveau_fifo_number(dev)-1); channel_old = (NV_READ(NV_PGRAPH_CTX_USER) >> 24) & (nouveau_fifo_number(dev)-1); @@ -549,8 +549,10 @@ void nouveau_nv10_context_switch(drm_device_t *dev) // save PGRAPH context for (i = 0; nv10_graph_ctx_regs[i]; i++) dev_priv->fifos[channel_old].nv10_pgraph_ctx[i] = NV_READ(nv10_graph_ctx_regs[i]); - if ((NV_READ(NV_PMC_BOOT_0) & 0x0ff00000)==0x01700000) - || (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000)==0x01800000)) + gpu_type = (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000); + if ((gpu_type==0x01700000) + || (gpu_type==0x01800000) + || (gpu_type==0x01f00000)) { for (; nv17_graph_ctx_regs[i]; i++) dev_priv->fifos[channel_old].nv10_pgraph_ctx[i] = NV_READ(nv17_graph_ctx_regs[i]); @@ -567,8 +569,9 @@ void nouveau_nv10_context_switch(drm_device_t *dev) #if 0 for (i = 0; nv10_graph_ctx_regs[i]; i++) NV_WRITE(nv10_graph_ctx_regs[i], dev_priv->fifos[channel].nv10_pgraph_ctx[i]); - if ((NV_READ(NV_PMC_BOOT_0) & 0x0ff00000)==0x01700000) - || (NV_READ(NV_PMC_BOOT_0) & 0x0ff00000)==0x01800000)) + if ((gpu_type==0x01700000) + || (gpu_type==0x01800000) + || (gpu_type==0x01f00000)) { for (; nv17_graph_ctx_regs[i]; i++) NV_WRITE(nv17_graph_ctx_regs[i], dev_priv->fifos[channel].nv10_pgraph_ctx[i]); |