diff options
author | nathan <nathan@7b3dc134-2b1b-0410-93df-9e9f96275f8d> | 2007-06-13 11:05:10 +0000 |
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committer | nathan <nathan@7b3dc134-2b1b-0410-93df-9e9f96275f8d> | 2007-06-13 11:05:10 +0000 |
commit | 64ad697b7dcd7aa1e4498befb158643ba3dcbe95 (patch) | |
tree | 03a9c99a4f407f89cc8d59ad8eedea199a2ab3c7 | |
parent | 506db8ebe83152e51f5cbab4fd864e56b7f3dc2a (diff) | |
download | eglibc2-64ad697b7dcd7aa1e4498befb158643ba3dcbe95.tar.gz |
* sysdeps/unix/sysv/linux/powerpc/libc-start.c
(__libc_start_main): Detect 8xx parts and clear
__cache_line_size if detected.
* sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c
(DL_PLATFORM_AUXV): Likewise.
git-svn-id: svn://svn.eglibc.org/branches/eglibc-2_5@2501 7b3dc134-2b1b-0410-93df-9e9f96275f8d
-rw-r--r-- | libc/ChangeLog.eglibc | 9 | ||||
-rw-r--r-- | libc/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c | 20 | ||||
-rw-r--r-- | libc/sysdeps/unix/sysv/linux/powerpc/libc-start.c | 16 |
3 files changed, 40 insertions, 5 deletions
diff --git a/libc/ChangeLog.eglibc b/libc/ChangeLog.eglibc index 125f86ba4..bce6544ef 100644 --- a/libc/ChangeLog.eglibc +++ b/libc/ChangeLog.eglibc @@ -1,3 +1,12 @@ +2007-06-13 Nathan Sidwell <nathan@codesourcery.com> + Mark Shinwell <shinwell@codesourcery.com> + + * sysdeps/unix/sysv/linux/powerpc/libc-start.c + (__libc_start_main): Detect 8xx parts and clear + __cache_line_size if detected. + * sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c + (DL_PLATFORM_AUXV): Likewise. + 2007-06-09 Joseph Myers <joseph@codesourcery.com> Backport from FSF mainline: diff --git a/libc/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c b/libc/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c index 7c02c6898..aed6fa60e 100644 --- a/libc/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c +++ b/libc/sysdeps/unix/sysv/linux/powerpc/dl-sysdep.c @@ -24,14 +24,26 @@ extern int __cache_line_size; weak_extern (__cache_line_size) -/* Scan the Aux Vector for the "Data Cache Block Size" entry. If found - verify that the static extern __cache_line_size is defined by checking - for not NULL. If it is defined then assign the cache block size - value to __cache_line_size. */ +/* Scan the Aux Vector for the "Data Cache Block Size" entry. If + found verify that the static extern __cache_line_size is defined by + checking for not NULL. If it is defined then assign the cache + block size value to __cache_line_size. This is used by memset to + optimize setting to zero. We have to detect 8xx processors, which + have buggy dcbz implementations that cannot report page faults + correctly. That requires reading SPR, which is a privileged + operation. Fortunately 2.2.18 and later emulates PowerPC mfspr + reads from the PVR register. */ #define DL_PLATFORM_AUXV \ case AT_DCACHEBSIZE: \ { \ int *cls = & __cache_line_size; \ + if (__LINUX_KERNEL_VERSION >= 0x020218) \ + { \ + unsigned pvr = 0; \ + asm ("mfspr %0, 287" : "=r" (pvr)); \ + if ((pvr & 0xffff0000) == 0x00500000) \ + cls = NULL; \ + } \ if (cls != NULL) \ *cls = av->a_un.a_val; \ } \ diff --git a/libc/sysdeps/unix/sysv/linux/powerpc/libc-start.c b/libc/sysdeps/unix/sysv/linux/powerpc/libc-start.c index a8005c116..546a612dd 100644 --- a/libc/sysdeps/unix/sysv/linux/powerpc/libc-start.c +++ b/libc/sysdeps/unix/sysv/linux/powerpc/libc-start.c @@ -108,13 +108,27 @@ int rtld_fini = NULL; } - /* Initialize the __cache_line_size variable from the aux vector. */ + /* Initialize the __cache_line_size variable from the aux vector. + This is used by memset to optimize setting to zero. We have to + detect 8xx processors, which have buggy dcbz implementations that + cannot report page faults correctly. That requires reading SPR, + which is a privileged operation. Fortunately 2.2.18 and later + emulates PowerPC mfspr reads from the PVR register. */ for (ElfW (auxv_t) * av = auxvec; av->a_type != AT_NULL; ++av) switch (av->a_type) { case AT_DCACHEBSIZE: { int *cls = &__cache_line_size; + + if (__LINUX_KERNEL_VERSION >= 0x020218) + { + unsigned pvr = 0; + + asm ("mfspr %0, 287" : "=r" (pvr) :); + if ((pvr & 0xffff0000) == 0x00500000) + cls = NULL; + } if (cls != NULL) *cls = av->a_un.a_val; } |