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-rw-r--r--lisp/progmodes/verilog-mode.el12
1 files changed, 6 insertions, 6 deletions
diff --git a/lisp/progmodes/verilog-mode.el b/lisp/progmodes/verilog-mode.el
index 8bb9256078a..eab34f6f026 100644
--- a/lisp/progmodes/verilog-mode.el
+++ b/lisp/progmodes/verilog-mode.el
@@ -4586,7 +4586,7 @@ This lets programs calling batch mode to easily extract error messages."
(verilog-mode))))
(buffer-list))
;; Process the files
- (mapcar '(lambda (buf)
+ (mapcar (lambda (buf)
(when (buffer-file-name buf)
(save-excursion
(if (not (file-exists-p (buffer-file-name buf)))
@@ -6373,7 +6373,7 @@ for matches of `str' and adding the occurrence tp `all' through point END."
(defun verilog-keyword-completion (keyword-list)
"Give list of all possible completions of keywords in KEYWORD-LIST."
- (mapcar '(lambda (s)
+ (mapcar (lambda (s)
(if (string-match (concat "\\<" verilog-str) s)
(if (or (null verilog-pred)
(funcall verilog-pred s))
@@ -6493,7 +6493,7 @@ and `verilog-separator-keywords'.)"
(all-completions verilog-str 'verilog-completion)))
(match (if verilog-toggle-completions
"" (try-completion
- verilog-str (mapcar '(lambda (elm)
+ verilog-str (mapcar (lambda (elm)
(cons elm 0)) allcomp)))))
;; Delete old string
(delete-region b e)
@@ -11447,13 +11447,13 @@ Wilson Snyder (wsnyder@wsnyder.org)."
(verilog-auto-re-search-do "/\\*AUTOINOUTCOMP([^)]*)\\*/" 'verilog-auto-inout-comp)
;; next in/outs which need previous sucked inputs first
(verilog-auto-re-search-do "/\\*AUTOOUTPUT\\((\"[^\"]*\")\\)\\*/"
- '(lambda () (verilog-auto-output t)))
+ (lambda () (verilog-auto-output t)))
(verilog-auto-re-search-do "/\\*AUTOOUTPUT\\*/" 'verilog-auto-output)
(verilog-auto-re-search-do "/\\*AUTOINPUT\\((\"[^\"]*\")\\)\\*/"
- '(lambda () (verilog-auto-input t)))
+ (lambda () (verilog-auto-input t)))
(verilog-auto-re-search-do "/\\*AUTOINPUT\\*/" 'verilog-auto-input)
(verilog-auto-re-search-do "/\\*AUTOINOUT\\((\"[^\"]*\")\\)\\*/"
- '(lambda () (verilog-auto-inout t)))
+ (lambda () (verilog-auto-inout t)))
(verilog-auto-re-search-do "/\\*AUTOINOUT\\*/" 'verilog-auto-inout)
;; Then tie off those in/outs
(verilog-auto-re-search-do "/\\*AUTOTIEOFF\\*/" 'verilog-auto-tieoff)