Merge remote-tracking branch 'qatar/master'

* qatar/master:
  vc1dec: Remove separate scaling function for interlaced field MVs
  vc1dec: Invoke edge_emulation regardless of MV precision
  x86: Use consistent 3dnowext function and macro name suffixes
  g723_1: scale output as supposed for the case with postfilter disabled
  g723_1: increase excitation storage by 4
  g723_1: fix upper bound parameter from inverse maximum autocorrelation
  g723_1: make scale_vector() behave like the reference
  g723_1: fix off-by-one error in normalize_bits()
  g723_1: save/restore excitation with offset to store LPC history
  wmapro: prevent division by zero when sample rate is unspecified
  x86: proresdsp: improve SIGNEXTEND macro comments
  x86: h264dsp: K&R formatting cosmetics
  LICENSE: Document all GPL files

Conflicts:
	libavcodec/g723_1.c
	libavcodec/wmaprodec.c
	libavcodec/x86/h264dsp_mmx.c

Merged-by: Michael Niedermayer <michaelni@gmx.at>

1 files changed, 7 insertions, 7 deletions

diff --git a/libavcodec/x86/dsputil_mmx.c b/libavcodec/x86/dsputil_mmx.c
index 85753e07f5..47b8ef1fc3 100644
--- a/libavcodec/x86/dsputil_mmx.c
+++ b/libavcodec/x86/dsputil_mmx.c
@@ -2485,9 +2485,9 @@ static void ac3_downmix_sse(float (*samples)[256], float (*matrix)[2],
 }
 
 #if HAVE_6REGS
-static void vector_fmul_window_3dnow2(float *dst, const float *src0,
-                                      const float *src1, const float *win,
-                                      int len)
+static void vector_fmul_window_3dnowext(float *dst, const float *src0,
+                                        const float *src1, const float *win,
+                                        int len)
 {
     x86_reg i = -len * 4;
     x86_reg j =  len * 4 - 8;
@@ -2939,11 +2939,11 @@ static void dsputil_init_3dnow(DSPContext *c, AVCodecContext *avctx,
 #endif
 }
 
-static void dsputil_init_3dnow2(DSPContext *c, AVCodecContext *avctx,
-                                int mm_flags)
+static void dsputil_init_3dnowext(DSPContext *c, AVCodecContext *avctx,
+                                  int mm_flags)
 {
 #if HAVE_6REGS && HAVE_INLINE_ASM
-    c->vector_fmul_window  = vector_fmul_window_3dnow2;
+    c->vector_fmul_window  = vector_fmul_window_3dnowext;
 #endif
 }
 
@@ -3194,7 +3194,7 @@ void ff_dsputil_init_mmx(DSPContext *c, AVCodecContext *avctx)
         dsputil_init_3dnow(c, avctx, mm_flags);
 
     if (mm_flags & AV_CPU_FLAG_3DNOWEXT && HAVE_AMD3DNOWEXT)
-        dsputil_init_3dnow2(c, avctx, mm_flags);
+        dsputil_init_3dnowext(c, avctx, mm_flags);
 
     if (mm_flags & AV_CPU_FLAG_SSE && HAVE_SSE)
         dsputil_init_sse(c, avctx, mm_flags);