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* Merge commit 'eecd29b3fd7fee221580798346d6582b75c7ade4'Michael Niedermayer2015-05-311-0/+1
|\ | | | | | | | | | | | | | | | | | | * commit 'eecd29b3fd7fee221580798346d6582b75c7ade4': ppc: vsx: Implement float_dsp Conflicts: libavutil/ppc/float_dsp_init.c Merged-by: Michael Niedermayer <michaelni@gmx.at>
| * ppc: vsx: Implement float_dspLuca Barbato2015-05-311-0/+1
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* | makefile: add Loongson-3 supportZhouXiaoyong2015-04-271-0/+1
| | | | | | | | Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | Makefile: Add support for MSA (MIPS-SIMD-Arch)Shivraj Patil2015-04-171-0/+1
| | | | | | | | | | | | Signed-off-by: Shivraj Patil <shivraj.patil@imgtec.com> Reviewed-by: Nedeljko Babic <Nedeljko.Babic@imgtec.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | configure, mips: remove MIPS32R2, merging it with MIPSFPUJames Cowgill2015-03-061-1/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | There are no independant uses of mips32r2 instructions except for the FPU parts. Due to the heavy use of mips32r2 specifc fpu extensions, I am guessing the original author intended MIPSFPU to imply MIPS32R2 anyway. Since these fpu instructions are available on mips64 (non-r2), enable them there as well. Also remove the last occurence of HAVE_MIPS32R2 (which is coupled to HAVE_MIPSFPU anyway). mips32r2 is left in the list of options form compatability so that using --disable-mips32r2 doesn't break anything. Signed-off-by: James Cowgill <james410@cowgill.org.uk> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* | Merge commit '8675bcb0addb1c7fb0b04682d1f3f95d5b8dae14'Michael Niedermayer2014-04-071-0/+1
|\ \ | |/ | | | | | | | | | | * commit '8675bcb0addb1c7fb0b04682d1f3f95d5b8dae14': aarch64: add armv8 CPU flag Merged-by: Michael Niedermayer <michaelni@gmx.at>
| * aarch64: add armv8 CPU flagJanne Grunau2014-04-061-0/+1
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* | Merge commit 'b4dd424d96f09f9bafb88e47f37df65dc4529143'Michael Niedermayer2014-03-131-2/+0
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * commit 'b4dd424d96f09f9bafb88e47f37df65dc4529143': Remove all SPARC architecture optimizations Conflicts: Makefile configure libavcodec/sparc/dsputil_vis.c libavcodec/sparc/dsputil_vis.h libavcodec/sparc/hpeldsp_vis.c libavcodec/sparc/simple_idct_vis.c libavcodec/sparc/vis.h libswscale/sparc/yuv2rgb_vis.c libswscale/swscale_internal.h If someone wants to maintain these (or other) SPARC optimizations, please contact me or ffmpeg-devel. I am happy to revert this removial if theres someone considering to maintain this code. Merged-by: Michael Niedermayer <michaelni@gmx.at>
| * Remove all SPARC architecture optimizationsDiego Biurrun2014-03-131-2/+0
| | | | | | | | | | SPARC is no longer being used in any multimedia-related fields and the VIS optimizations only represent a maintenance burden.
* | Merge commit 'b326755989b346d0d935e0628e8865f9b2951c30'Michael Niedermayer2012-12-081-1/+1
|\ \ | |/ | | | | | | | | | | * commit 'b326755989b346d0d935e0628e8865f9b2951c30': arm: rename ARMVFP config symbol to VFP Merged-by: Michael Niedermayer <michaelni@gmx.at>
| * arm: rename ARMVFP config symbol to VFPMans Rullgard2012-12-071-1/+1
| | | | | | | | | | | | | | This is consistent with usual ARM nomenclature as well as with the VFPV3 and NEON symbols which both lack the ARM prefix. Signed-off-by: Mans Rullgard <mans@mansr.com>
* | Merge commit 'ca411fc1d34329cd17b28627f697e391ae52073f'Michael Niedermayer2012-10-131-1/+0
|\ \ | |/ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * commit 'ca411fc1d34329cd17b28627f697e391ae52073f': avcodec: Remove broken MMI optimizations Conflicts: arch.mak configure libavcodec/avcodec.h libavcodec/mips/Makefile libavcodec/mips/dsputil_mmi.c libavcodec/mips/idct_mmi.c libavcodec/mips/mmi.h libavcodec/mips/mpegvideo_mmi.c libavcodec/options_table.h Merged-by: Michael Niedermayer <michaelni@gmx.at>
| * avcodec: Remove broken MMI optimizationsDiego Biurrun2012-10-121-2/+0
| | | | | | | | The code fails to compile and is broken beyond repair.
* | Optimization of AMR NB and WB decoders for MIPSNedeljko Babic2012-06-111-0/+4
|/ | | | | | | | | | | | | | | | | | | | | | | | | | AMR NB and WB decoders are optimized for MIPS architecture. Appropriate Makefiles are changed accordingly. Cnfigure script is changed in order to support optimizations. Optimizations are enabled by default when compiling is done for mips architecture. Appropriate cflags are automatically set. Support for several mips CPUs is added in configure script. New ffmpeg options are added for disabling optimizations. The FFMPEG option --disable-mipsfpu disables MIPS floating point optimizations. The FFMPEG option --disable-mips32r2 disables MIPS32R2 optimizations. The FFMPEG option --disable-mipsdspr1 disables MIPS DSP ASE R1 optimizations. The FFMPEG option --disable-mipsdspr2 disables MIPS DSP ASE R2 optimizations. Signed-off-by: Nedeljko Babic <nbabic@mips.com> Reviewed-by: Vitor Sessak <vitor1001@gmail.com> Signed-off-by: Michael Niedermayer <michaelni@gmx.at>
* build: Consistently handle conditional compilation for all optimization OBJS.Diego Biurrun2012-04-121-0/+13