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authorhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2008-05-15 03:19:49 +0000
committerhailfinger <hailfinger@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>2008-05-15 03:19:49 +0000
commit05087a63573c9aaa711f3aa3deeddeaa76877b0b (patch)
tree68c1d560242821885e66578bca46a1e6c68eb36c /spi.c
parente91f12496a56ee766a078cbe1a53ab5462c8be94 (diff)
downloadflashrom-05087a63573c9aaa711f3aa3deeddeaa76877b0b.tar.gz
Original v2 revision: 3320
Add support for the JEDEC RES (Read Electronic Signature and Resume from Powerdown) SPI command to flashrom to identify older SPI chips which can't handle JEDEC RDID. Since RES gives a one-byte identifier which is shared among many different vendors and even different sizes, we want to match RES as a last resort if RDID returns 0xff 0xff 0xff. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> This is a heavily reworked version of a patch by Fredrik Tolf, which was Signed-off-by: Fredrik Tolf <fredrik@dolda2000.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@235 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'spi.c')
-rw-r--r--spi.c41
1 files changed, 40 insertions, 1 deletions
diff --git a/spi.c b/spi.c
index 786d555..ddb9ff8 100644
--- a/spi.c
+++ b/spi.c
@@ -49,6 +49,16 @@ static int spi_rdid(unsigned char *readarr)
return 0;
}
+static int spi_res(unsigned char *readarr)
+{
+ const unsigned char cmd[JEDEC_RES_OUTSIZE] = {JEDEC_RES, 0, 0, 0};
+
+ if (spi_command(JEDEC_RES_OUTSIZE, JEDEC_RES_INSIZE, cmd, readarr))
+ return 1;
+ printf_debug("RES returned %02x.\n", readarr[0]);
+ return 0;
+}
+
void spi_write_enable()
{
const unsigned char cmd[JEDEC_WREN_OUTSIZE] = {JEDEC_WREN};
@@ -65,7 +75,7 @@ void spi_write_disable()
spi_command(JEDEC_WRDI_OUTSIZE, JEDEC_WRDI_INSIZE, cmd, NULL);
}
-int probe_spi(struct flashchip *flash)
+int probe_spi_rdid(struct flashchip *flash)
{
unsigned char readarr[3];
uint32_t manuf_id;
@@ -102,6 +112,35 @@ int probe_spi(struct flashchip *flash)
return 0;
}
+int probe_spi_res(struct flashchip *flash)
+{
+ unsigned char readarr[3];
+ uint32_t model_id;
+ if (!spi_rdid(readarr)) {
+ /* Check if RDID returns 0xff 0xff 0xff, then we use RES. */
+ if ((readarr[0] != 0xff) || (readarr[1] != 0xff) ||
+ (readarr[2] != 0xff))
+ return 0;
+ } else {
+ /* We couldn't issue RDID, it's pointless to try RES. */
+ return 0;
+ }
+ if (!spi_res(readarr)) {
+ model_id = readarr[0];
+ printf_debug("%s: id 0x%x\n", __FUNCTION__, model_id);
+ if (model_id == flash->model_id) {
+ /* Print the status register to tell the
+ * user about possible write protection.
+ */
+ spi_prettyprint_status_register(flash);
+
+ return 1;
+ }
+ }
+
+ return 0;
+}
+
uint8_t spi_read_status_register()
{
const unsigned char cmd[JEDEC_RDSR_OUTSIZE] = {JEDEC_RDSR};