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* print_wiki: fix columns calculations.stefanct2012-07-291-55/+79
| | | | | | | | | | | | | | | | | for - chipsets - boards, and - chips Previously the chipset columns were not uniformly divided at all, which led to very odd table bottoms. This patches fixes this as far as wiki code can do (browser rendering can still create odd effects because we do not define cell heights). Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1556 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Introduce enum test_state.stefanct2012-07-284-508/+525
| | | | | | | | | | | | | | | | Previously boards in the wiki were tagged either as working or as known bad. But we added support to various boards via board enables that were then never tested because the owners have not reported back. This can now be tagged with NT and is shown appropriately. Also, the underlying data structure indicating state was converted from macros to an enum while preserving original integer values and is used for programmers and chipsets too. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1555 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add a bunch of new/tested stuff and various small changes 13.stefanct2012-07-288-34/+78
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested Mainboards: OK: - ASRock A780FullHD http://www.flashrom.org/pipermail/flashrom/2012-July/009599.html - ASRock 880G Pro3 http://www.flashrom.org/pipermail/flashrom/2012-July/009492.html - ASRock N61P-S http://www.flashrom.org/pipermail/flashrom/2012-May/009316.html - ASUS M2N68-VM http://www.flashrom.org/pipermail/flashrom/2012-May/009334.html - ASUS M3N78 PRO http://www.flashrom.org/pipermail/flashrom/2012-July/009519.html - ASUS M4N68T V2 http://www.flashrom.org/pipermail/flashrom/2012-May/009277.html - ASUS M5A78L-M LX reported by clavile on IRC - ASUS P8P67 PRO (rev. 3.0) http://www.flashrom.org/pipermail/flashrom/2012-April/009188.html - ASUS P8Z68-V reported by Kano on IRC http://paste.flashrom.org/view.php?id=1232 - ASUS SABERTOOTH 990FX http://paste.flashrom.org/view.php?id=1214 - Dell Inspiron 1420 http://www.flashrom.org/pipermail/flashrom/2012-May/009196.html - ECS GF8200A http://www.flashrom.org/pipermail/flashrom/2012-May/009256.html - GIGABYTE GA-H61M-D2H-USB3 http://www.flashrom.org/pipermail/flashrom/2012-May/009333.html - MSI MS-7250 (K9N SLI (rev 2.1)) http://www.flashrom.org/pipermail/flashrom/2012-June/009436.html - MSI MS-7676 (Z68MA-G45 (B3)) http://www.flashrom.org/pipermail/flashrom/2012-June/009424.html - Palit N61S http://www.flashrom.org/pipermail/flashrom/2012-May/009212.html NOT OK: - ASRock H61M-ITX http://www.flashrom.org/pipermail/flashrom/2012-May/009224.html - Dell Latitude E6520 http://www.flashrom.org/pipermail/flashrom/2012-May/009197.html - Dell Vostro 3700 http://www.flashrom.org/pipermail/flashrom/2012-May/009197.html - Intel DH61AG http://www.flashrom.org/pipermail/flashrom/2012-June/009417.html - Intel DQ965GF http://www.flashrom.org/pipermail/flashrom/2012-May/009295.html - HP/Compaq 8100 Elite CMT PC (304Bh) http://paste.flashrom.org/view.php?id=1182 - HP Z400 Workstation (0AE4h) http://www.flashrom.org/pipermail/flashrom/2012-June/009350.html - Supermicro X9DR3-F http://www.flashrom.org/pipermail/flashrom/2012-June/009422.html Tested flash chips: - mark AMIC A25L032 as TEST_OK_PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-June/009363.html - mark Atmel AT25DF321A as TEST_OK_PREW (+REW) http://www.flashrom.org/pipermail/flashrom/2012-July/009492.html - mark Atmel AT26DF161 as TEST_OK_PR (+PR) http://www.flashrom.org/pipermail/flashrom/2012-June/009350.html - mark Eon EN25QH16 as TEST_OK_PR (+PR) http://www.flashrom.org/pipermail/flashrom/2012-July/009566.html - mark SST SST39VF010 as TEST_OK_PREW (+W) http://www.flashrom.org/pipermail/flashrom/2012-June/009425.html - mark ST M25P64 as TEST_OK_PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-May/009332.html Tested chipset enables: - Intel 3420 http://www.flashrom.org/pipermail/flashrom/2012-May/009332.html - Add board enable for ASUS P5GD2-X lspci: http://paste.flashrom.org/view.php?id=1234 write: http://paste.flashrom.org/view.php?id=1240 Miscellaneous - Reorder some boards in print.c. - Remove broken abit URLs. - Whitespace changes. - Fix the maximum number of southbridge straps in the ICH descriptor structs. - Refine documentation regarding ICH region lock bits. - Demote verbosity of ICH Opcode reprogramming to -VV. - Exclude Pony-SPI for DOS targets (missing serial support). Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1554 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Intel 7 Series fixes (addition of QM77, fixed straps printing).stefanct2012-07-241-2/+4
| | | | | | | | | | I looked at the datasheet to be sure that the strap names (SPI, PCI, LPC) are the same as on the series 5 and 6 chipsets. Signed-off-by: Helge Wagner <Helge.Wagner@ge.com> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1553 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Always require the --programmer parameter on the command line if anyhailfinger2012-07-223-107/+67
| | | | | | | | | | | | flash chip access (probe/read/write/erase/...) is requested. Fix a few man page oddities as well. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1552 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Automatically release I/O permissions on shutdown.hailfinger2012-07-2115-57/+56
| | | | | | | | | | | | | | | | | | | | | | get_io_perms() is renamed to rget_io_perms() and automatically registers a function to release I/O permissions on shutdown. Actually release I/O permissions on Solaris and iopl()-supporting operating systems like Linux. This patch fixes quite a few programmers which forgot to release I/O permissions on shutdown, and it simplifies the shutdown and error handling code for all others. Do not call exit(1) if I/O permissions are denied and return an error instead. This part of the patch was written by Niklas Söderlund. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Niklas Söderlund <niso@kth.se> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1551 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Document --output in the man page.hailfinger2012-07-211-0/+27
| | | | | | | | | | Add an examples section to the man page. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1550 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Hide hwaccess.h from public API.hailfinger2012-07-2026-1/+26
| | | | | | | | | | | | | | Move hwaccess.h #include from flash.h to individual drivers. libflashrom users need flash.h, but they do not care about hwaccess.h and should not see its definitions because they may conflict with other hardware access functions and #defines used by the libflashrom user. Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Check vendor_id for PCI based external programmers.hailfinger2012-07-163-133/+116
| | | | | | | | | | | | | | | Restructure PCI device detection code. Rename pcidev_validate to pcidev_readbar. Note: Slight changes in behaviour are possible, especially on dual/quad chip NICs which appear as more than one PCI device. Found devices are no longer printed at _pinfo level, but rather at _pdbg level. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1548 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add board enable for MSI K9N SLI (MS-7250 VER:2.1)hailfinger2012-06-291-0/+3
| | | | | | | | | | | Handle PCI Device ID 0x0360 for MCP55 ISA bridge GPIO as well. Signed-off-by: Joshua Roys <roysjosh@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Stefan A. Scholtz git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1547 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add native SPI AAI write support to the Dediprog SF100 driverhailfinger2012-06-191-20/+47
| | | | | | | | | | | | | | To tell the programmer how to handle the data on the spi bus, a flag in the fourth byte sent with the usb command is used. The second word was mistaken for the size of the chunks sent over usb earlier. The third byte (first of the second word) is now set to zero. This also adds some checks for the size of data chunks sent over usb. Signed-off-by: Nico Huber <nico.huber@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1546 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Remove exit() call from show_idhailfinger2012-06-162-2/+5
| | | | | | | | | | | The only caller is able to check the return code and handle it correctly. Signed-off-by: Niklas Söderlund <niso@kth.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1545 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add voltage change delays to dediprog driverhailfinger2012-06-161-0/+8
| | | | | | | | | | | | Some investigations have shown that the original dediprog driver waits about 200ms after setting voltage up and before setting voltage down. This patch adds those delays. It helps flash chips to come up in time. Signed-off-by: Nico Huber <nico.huber@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Let the programmer driver decide how to do AAI transfershailfinger2012-06-1515-3/+24
| | | | | | | | | | | | | | | | | Currently spi_aai_write() is implemented without an abstraction mechanism for the programmer driver. This adds another function pointer 'write_aai' to struct spi_programmer, which is set to default_spi_write_aai (renamed spi_aai_write) for all programmers for now. A patch which utilises this abstraction in the dediprog driver will follow. Signed-off-by: Nico Huber <nico.huber@secunet.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1543 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix setting the divisor in ft2232_spi.stefanct2012-06-141-2/+2
| | | | | | | | | | The patch that should have improved the clock divisor setting in r1537 made it much worse: the divisor used was from an uninitialized buffer. Signed-off-by: Ilya A. Volynets-Evenbakh <ilya@total-knowledge.com> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1542 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Bus Pirate buffer management revamphailfinger2012-06-082-67/+110
| | | | | | | | | | | | | | The buffer management of the Bus Pirate driver has been revamped to use grow-only buffers with a reasonable initial default size so realloc() will not have to be called in normal operation. A side effect is the ability to switch to a static buffer without major hassle. Handle OOM gracefully. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1541 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add logfile support to flashromhailfinger2012-06-064-19/+118
| | | | | | | | | | | | | | Usage: flashrom --output logfile.txt Logfile output has at least dbg2 verbosity or screen verbosity, whichever is greater. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested on Linux, Windows and FreeBSD. Acked-by: Idwer Vollering <vidwer@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1540 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for PMC Pm39LV512.stefanct2012-05-201-1/+31
| | | | | | | | | | This flash is like PMC model Pm39LV010 but capacity is 64kB. Model ID was already defined. PREW works for me. Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1539 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Remove sharplhf00l04.c.stefanct2012-05-162-57/+1
| | | | | | | | | | | The currently unreferenced function in sharplhf00l04.c does a standard FWH block protection reset (writes 0 to the protection register) and a standard FWH block erase. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1538 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* ft2232_spi.c: add frequency divisor parameter.stefanct2012-05-152-17/+48
| | | | | | | | | | | | This adds an optional argument when using the ft2232_spi programmer to set the frequency divisor. The valid values for the divisor is any even integer between 2 and 131072. Signed-off-by: Samir Ibradžić <sibradzic@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1537 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Convert printf to msg_* where appropriate.hailfinger2012-05-144-88/+98
| | | | | | | | | | | | | | | | Clean up cli_output.c to be more readable. Use enum instead of #define for message levels. Kill a few exit(0) calls. Print the command line arguments in verbose mode. Move actions (--list-supported etc.) after argument sanity checks. Reduce the number of code paths which have their own programmer_shutdown(). Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1536 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for Eon EN25QH32.stefanct2012-05-142-1/+38
| | | | | | | | | | Its ID was spotted in an descriptor region update by Jetway: http://paste.flashrom.org/view.php?id=1217 Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1535 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* dummyflasher.c: add support for SFDP by adding a new emulator chip: MX25L6436stefanct2012-05-072-11/+100
| | | | | | | | | | | The chip features a complete 1.0 SFDP JEDEC flash parameter table and also a vendor-specific extension table (defining voltages, lock bits etc). NB: the MX25L6436 uses the same RDID as the MX25L6405. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add Winbond W836xx SuperI/O detection.hailfinger2012-05-063-20/+162
| | | | | | | | | | | | | Add ITE IT8707F/IT8710F detection. Note that we autodetect those chips, but we don't handle their flash translation features automatically yet. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1533 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* dummyflasher: Add a status register to SPI chips.stefanct2012-05-065-23/+82
| | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1532 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Refine reprogram_opcode_on_the_fly to indicate wrong readcnt/writecnt ↵stefanct2012-05-061-13/+14
| | | | | | | | | combinations. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add manpage entry for pony_spimkarcher2012-05-051-0/+23
| | | | | | | Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1530 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Function to enable the flash interface on w83697 family SuperIO chips.hailfinger2012-05-051-0/+33
| | | | | | | | | | Not hooked up to the superio detection framework yet. Signed-off-by: David Borg <borg.db@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1529 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* spi25.c: Refactor spi_write_status_register helpers.stefanct2012-05-021-58/+14
| | | | | | | | | | | | | | | | | | | | | | | | | In r1115 "Write protection handling for Atmel AT25*" the old spi_write_status_register function was duplicated to send WREN and EWSR commands respectively controlled by a new common wrapper function spi_write_status_register without a reason. Both functions' resulting code is equal apart from the opcode used. The code itself does also differ in the macros used, but their value (apart from the opcode) is equal. This patch adds a new parameter for the opcode to the helper function which allows removal of the other one. This relies on the fact that EWSR and WREN have the same INSIZE and OUTSIZE though. If that is really seen as an issue, the sizes could be made parameters too. This patch also changes the wrapper so that it no longer sets the feature bits of the struct flash(ctx) argument. This may result in changed output, because it no longer implicitly disables the debug message in following executions. Since almost all chips had their feature bits fixed in the previous commit, this is a minor problem. Also, spi_write_status_enable has been dead code since r658 or so. Remove it. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1528 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Tag all EWSR chips correctly.stefanct2012-05-022-2/+87
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | All SPI chips without a WRSR feature bit set were evaluated except the Sanyo LF25FW203A for which no datasheet is available. The following list includes all SPI-capable chips that still have no WRSR feature bit set: - AT26DF041 - AT45CS1282 - AT45DB011D - AT45DB021D - AT45DB041D - AT45DB081D - AT45DB161D - AT45DB321C - AT45DB321D - AT45DB642D All of them have no write function set and can be therefore ignored for now. Apart from those the generic chips are also not tagged. The opaque flash interface should not be affected. The SFDP dummy chip is changed to explicitly set EWSR if it can't deduce it dynamically. The vendor detecting generic chips can't write anyway. Signed-off-by: Steven Zakulec <spzakulec@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1527 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add board enable for ASUS P5BV-R.stefanct2012-05-022-0/+11
| | | | | | | | | | | | These are used in ASUS RS120-E5/PA2 servers. GPIO pin discovered, patch prepared and Tested-by: Geoffrey McRae Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1526 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add serial port bitbanging codemkarcher2012-04-306-1/+283
| | | | | | | | | | | This adds the pony_spi driver which supports the SI_Prog adapter, which is commonly used for SPI chips with PonyProg 2000, and a custom adapter called "SERBANG" which differs in the logic of two pins. Signed-off-by: Virgil-Adrian Teaca <darkstarlinux@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1525 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add a bunch of new/tested stuff and various small changes 12.stefanct2012-04-277-27/+190
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested Mainboards: OK: - ASUS M4A785T-M http://www.flashrom.org/pipermail/flashrom/2012-April/009118.html - ASUS P5VD2-MX http://www.flashrom.org/pipermail/flashrom/2012-March/009014.html - ASUS P8Z68-V PRO/GEN3 http://www.flashrom.org/pipermail/flashrom/2012-April/009086.html - Bachmann electronic OT200 http://www.flashrom.org/pipermail/flashrom/2012-April/009094.html - Biostar N61PB-M2S http://www.flashrom.org/pipermail/flashrom/2012-March/008958.html - GIGABYTE GA-H61M-D2-B3 http://www.flashrom.org/pipermail/flashrom/2012-March/009002.html - MSI MS-7740 (H61MA-E35(B3)) http://www.flashrom.org/pipermail/flashrom/2012-March/008985.html - Tyan S2875 (Tiger K8W) http://www.flashrom.org/pipermail/flashrom/2012-March/008986.html - ZOTAC nForce 630i Supreme (N73U-Supreme) http://www.flashrom.org/pipermail/flashrom/2012-April/009073.html - ZOTAC ZBOX AD02 (PLUS) http://www.flashrom.org/pipermail/flashrom/2012-April/009047.html NOT OK: - ASRock H67M http://www.flashrom.org/pipermail/flashrom/2012-March/008909.html - ASUS P8P67 LE http://paste.flashrom.org/view.php?id=1097 - ASUS Maximus IV Extreme http://www.flashrom.org/pipermail/flashrom/2012-March/009033.html - Biostar H61MU3 http://www.flashrom.org/pipermail/flashrom/2012-February/008832.html - Biostar M7VIQ http://www.flashrom.org/pipermail/flashrom/2012-February/008863.html - Dell Inspiron 580 http://www.flashrom.org/pipermail/flashrom/2012-March/008888.html - Dell Vostro 460 http://www.flashrom.org/pipermail/flashrom/2012-April/009144.html - Fujitsu-Siemens CELSIUS W410 (D3062-A1) http://www.flashrom.org/pipermail/flashrom/2012-March/008987.html - EPoX EP-3PTA http://www.flashrom.org/pipermail/flashrom/2012-April/009043.html - HP XW6400 http://www.flashrom.org/pipermail/flashrom/2012-March/009006.html - HP XW9300 http://www.flashrom.org/pipermail/flashrom/2012-February/008862.html - Intel DG965OT http://paste.flashrom.org/view.php?id=1096 - Intel DN2800MT (Marshalltown) http://www.flashrom.org/pipermail/flashrom/2012-April/009095.html - Lenovo T420 http://paste.flashrom.org/view.php?id=1095 - Lenovo X1 http://www.flashrom.org/pipermail/flashrom/2012-April/009135.html - MSI GF615M-P33 http://www.flashrom.org/pipermail/flashrom/2012-March/008956.html Tested flash chips: - mark EN25Q32(A/B) as TEST_OK_PROBE (+P) http://www.flashrom.org/pipermail/flashrom/2012-February/008832.html - mark S25FL032A as TEST_OK_PR (+PR) http://www.flashrom.org/pipermail/flashrom/2012-April/009105.html - mark AT25DF161 as TEST_OK_PROBE (+P) http://www.flashrom.org/pipermail/flashrom/2012-April/009095.html - mark SST as TEST_OK_PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2012-April/009094.html Tested chipset enables: - H61 (various reports) - SiS 755 http://www.flashrom.org/pipermail/flashrom/2012-April/009072.html - Fix compilation of ich_descriptor_tool which was broken since r1492. - Add Documentation regarding unlocking the ME region on Intel chipsets. - Fix reading the flash descriptor via FDOC/FDOD and prettyprinting of the descriptor on boards with 5 active regions. - Reorder some boards in print.c. - Add Intel 7 Series (Panther Point) PCI IDs. - Add preliminary PCI IDs for future Intel chipsets (DH89xxCC and Lynx Point) see https://lkml.org/lkml/2012/2/20/467 - Change the message for untested chipsets to send only after an attempt to update the firmware with flashrom. - Fix warnings in ich_descriptor_tool's build. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1524 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Check for duplicate -i arguments.stefanct2012-04-151-9/+25
| | | | | | | | | And a tiny cleanup. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1523 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for for the Atmel AT49F040 chip.uwe2012-04-154-22/+70
| | | | | | | | | | | | Chip features an optional permanent boot block write protection. Signed-off-by: David Borg <borg.db@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1522 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for the Eon EN29LV640B chip.uwe2012-04-145-3/+178
| | | | | | | | | | | | | | This chip needs special command sequences in 8 bit mode. Also, 8 bit programming needs actually 16bit double byte program. The chip is found on the Bifferos Bifferboard, for example. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1521 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add GigaDevice GD25QXX series support.uwe2012-04-142-0/+271
| | | | | | | | | | | | | | | | http://www.gigadevice.com/Product/SPI.php?WebPageTypeId=98&WebPageTypeId2=151&WebPageTypeId3=134 The GD25Q80 has been successfully tested, the other ones are marked as untested for now. http://www.flashrom.org/pipermail/flashrom/2012-March/009028.html Signed-off-by: Justin Chevrier <jchevrier@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1520 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Minor NetBSD/DragonFly/pkgsrc build instruction update.uwe2012-04-141-1/+2
| | | | | | | | | | | | Add -I/usr/pkg/include to NetBSD/Dragon Fly build example CPPFLAGS. This is needed to pick up libftdi. Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1519 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for the Numonyx N25Q064 chip.uwe2012-04-142-0/+30
| | | | | | | | | | | | | All operations were successfully tested. http://www.flashrom.org/pipermail/flashrom/2012-April/009048.html Signed-off-by: Niklas Söderlund <niklas.soderlund@ericsson.com> Acked-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1518 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Make the presence of Linux SPI headers mandatory for linux_spi.stefanct2012-03-132-1/+27
| | | | | | | | | | | This solution is copied from ft2232_spi and is equally hacky. Thanks to M.K. for investigating the history of <linux/spi/spidev.h>, which led to a hopefully more robust check. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1517 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add (untested) board enable for ASUS TUSL2-Cstefanct2012-03-102-0/+3
| | | | | | | | | | | | Primary IDs SMBus controller, secondary IDs MCH. The reverse engineering was done by Michael Karcher. Андрей Тимираев <dark_prof@mail.ru> reported the problem, but did not reply (yet) to our propsed fix. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1516 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Increase flashrom release number to 0.9.5.2hailfinger2012-03-081-1/+1
| | | | | | | | Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1514 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Prevent submission of empty read requests in linux_spi.mkarcher2012-03-061-2/+14
| | | | | | | | | | | | | | The submission of zero-sized read requests in a write-only transaction fails at least for omap2_mcspi drivers and is pointless in general. This patch does not address the implementation of zero-sized writes (which would need to skip the write command), as there are no flash transactions not starting with a command. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1513 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* linux_spi.c: set SPI mode, bit order and bits per word on init.stefanct2012-03-031-3/+19
| | | | | | | | | | | | | | Previously we relied on a correctly set up state. Also, we start to rely on the shutdown function for cleanup after registering it, i.e. we no longer explicitly call close(fd) after register_shutdown(). Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Tested-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1512 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix parallel-style programmer access from ITE IT87/Winbond W83627 SPIhailfinger2012-03-015-4/+12
| | | | | | | | | | | | | | | | | | | | | | | | The ITE IT87 SPI driver uses a trick to speed up reading and writing: If a flash chip is 512 kByte or less, the flash chip can be completely mapped in memory and both read and write accesses are faster that way. The current IT87 SPI code did use the parallel programmer interface for memory mapped reads and writes, but that's the wrong abstraction. It has been fixed to use mmio_read*/mmio_write* for that purpose. The Winbond W83627 SPI driver uses the same trick in its read path for all supported chip sizes. Fix it the same way. Switch internal_chip_readn to use mmio_readn as proper abstraction. Kudos to Michael Karcher for spotting the bugs. Reported-by: Johan Svensson <flashrom.js@crypt.se> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Tested-by: Johan Svensson <flashrom.js@crypt.se> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1511 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* nicintel_spi.c: check if write enable is really set (and minor comment changes).stefanct2012-02-271-3/+14
| | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Idwer Vollering <vidwer@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1510 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Increase flashrom release number to 0.9.5.1hailfinger2012-02-251-1/+1
| | | | | | | | Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1508 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Support Debian/kFreeBSDhailfinger2012-02-254-7/+14
| | | | | | | | | | Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Robert Millan <rmh@debian.org> Tested-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* SFDP: Fetch parameter table in a more portable wayhailfinger2012-02-241-7/+16
| | | | | | | | | | | | | | SFDP parameter table reads expect a dummy byte between written data (opcode+address) and read data on the SPI bus. Read that dummy byte instead of writing it to be compatible with all programmer drivers. Reduce SFDP parameter table read chunk size from 8 to 2 to handle programmers with small readcount limits. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1506 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix SFDP probing.stefanct2012-02-221-26/+39
| | | | | | | | | | | | | | | | | | | | | | sfdp_add_uniform_eraser checks for existing erasers. Due to a bug it looked for eraser slots that have no erase functions set instead of those that have one set. Postpone adding an erase function for the special 4k block erase opcode until we know the flash chip size and add an additional check to sfdp_add_uniform_eraser. Fix the output of the parameter table contents. This patch fixes the index used to retrieve the eraser types, which was off one double word. Refine some messages and add a few further debugging prints. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1505 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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