| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch is based on a number of changes by David Woodhouse and
David Hendricks.
SF600 uses two bulk endpoints, 1 for out and 2 for in unlike the
SF100 that uses only a single one. This patch make endpoint usage
more explicit and sets the in/out endpoint(s) appropriately for
SF100 and SF600.
Also, change all SF100-specific strings in messages and
leave standalone mode on SF600s.
Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1927 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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If libpci, libusb0 or libusb1 are missing, make will now tell you which
currently enabled features require those libraries.
Example output:
Checking for libusb-0.1/libusb-compat headers... not found.
The following features require libusb-0.1/libusb-compat:
CONFIG_PICKIT2_SPI CONFIG_DEDIPROG.
Please install libusb-0.1 headers or libusb-compat headers.
See README for more information.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Urja Rannikko <urjaman@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch has been cherry-picked from various patches in the chromiumos
tree denoted below.
Change-Id: I4b679e23ab37a4357b1e3d23f6f65a1c31f7d71a
Change-Id: Ibda56201ab4519315431c08206c61ceffb7c7e65
Change-Id: I540ad2d304dc69a7c79ca154beb744ef947ff808
Servo V2 has two FT4232H parts. The first one (denoted 'legacy') is
dedicated to supporting orginal Servo V1 functionality. The second,
residing at USB ID 0x18d1:5003 provides two other SPI interfaces on
port A and B respectively.
Additional changes by Alexandru Gagniuc, Hatim Kanchwala and Urja Rannikko:
- The clock divisor is set to '6', as this creates a 10MHz SPI clock,
which is the same SPI clock that the chromiumos branch produced.
- Add udev rule for Google servo boards to util/flashrom.rules.
- Add Google servo entry to manpage.
Signed-off-by: Todd Broch <tbroch@chromium.org>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Hatim Kanchwala <hatim@hatimak.me>
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Hatim Kanchwala <hatim@hatimak.me>
Acked-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1925 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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We use a header for MSR accesses on AMD Geodes that does only exist
on 32 bit x86 machines.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1924 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Hatim Kanchwala <hatim@hatimak.me>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The earlier versions of the chip require 0x2AAA for probes thus split the
definitions and set them to untested to provoke reports.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1922 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Urja Rannikko <urjaman@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Urja Rannikko <urjaman@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1920 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This allows for even more easy debugging of build failures due to
problems with libraries.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The new protocol changes some commands, so adjust the code to support
these. Use helper functions to reduce duplication in libusb calls. Testing
with real hardware showed that the maximum read size via the control
endpoint is about 16 bytes although specification does not mention that.
Dediprog SF600 is not supported yet.
Based on the following chromiumos changes:
Change-Id: Ibd1e27d9e8273ba879b9b5d95675b99596255c89
Change-Id: Ifc33e7b1eed5b0cb80f83458fa24741a577fa46a
Additionally, some ideas from Alex for cleaner code were incorporated as well.
Tested on an SF100 V4 with both firmware generations PREWing a M25PX80
and AT45DB041D (the latter is using dediprog_spi_send_command() instead
of optimized functions which make it a good test vehicle).
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: David Hendricks <dhendrix@chromium.org>
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1918 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested mainboards:
OK:
- ASRock G31M-GS
Reported by Александр Трубицын
- ASRock G41M-VS3
Reported by Александр Трубицын
- ASRock N68C-S UCC
Reported by Alexey Belyaev
- ASRock AMCP7AION-HT (ION 330HT(-BD))
Reported by Stefan Tauner
- ASUS P5K SE
Reported by Александр Трубицын
- ASUS P5KPL-VM
Reported by Marin Vlah
- ASUS RAMPAGE III GENE
Reported by stevessss on IRC
- GIGABYTE GA-945GM-S2
Reported by Александр Трубицын
- GIGABYTE GA-945GCM-S2 (rev. 3.0)
Reported by Александр Трубицын
- GIGABYTE GA-965P-S3
Reported by Александр Трубицын
- GIGABYTE GA-EG43M-S2H
Reported by Александр Трубицын
- GIGABYTE GA-EP31-DS3L (rev. 1.0)
Reported by Александр Трубицын
- GIGABYTE GA-G33M-S2
Reported by Александр Трубицын
- GIGABYTE GA-G33M-S2L
Reported by Александр Трубицын
- GIGABYTE GA-H55M-S2
Reported by Александр Трубицын
- GIGABYTE GA-J1900N-D3V
Reported by Marcos Truchado and Guillermo von Hünefeld
- GIGABYTE GA-K8NS
Reported by nicolae788
- GIGABYTE GA-M56S-S3
Reported by Estevo Paz Freire
- GIGABYTE GA-P31-DS3L
Reported by Александр Трубицын
- GIGABYTE GA-P31-S3G
Reported by Александр Трубицын
- MSI MS-7336
Reported by Benjamin Bellec
- MSI X79A-GD45 (8D) (MS-7760)"
Reported by mortehu on IRC
- Supermicro A1SAi-2550F
Reported by Bernard Grymonpon
- Supermicro X7DWT
Reported by Steven Stremciuc
Laptop:
- ASUS U38N
Reported by Ultra on IRC
- Dell Latitude D630
Reported by Márton Miklós
- Fujitsu Amilo Xi 3650
Reported by Elmar Stellnberger
- Lenovo T400 (whitelisting only)
Chipsets:
- Mark 8086:1f38 (Intel Avoton/Rangeley) as tested
Reported by Jeremy Porter and Bernard Grymonpon
- Add Intel Sunrise Point IDs but no support yet.
Flash chips:
- Atmel AT45DB321D to PREW (+PREW)
Reported by The Raven
- Eon EN25QH32 to PREW (+PREW)
Reported by Josua Mayer
- Eon EN25QH64 to PREW (+EW)
Reported by David s. Alessio
- GigaDevice GD25LQ64(B) to PREW (+PREW)
Reported by Greg Tippit
- Intel 28F001BN/BX-T to PREW (+EW)
Reported by Lu Xie
- Micron M25P10-A to PREW (+W)
Reported by the Raven
- Micron M25PE40
Reported by David Wood
- Micron N25Q128..3E to PREW (+PREW)
Reported by Miklós Márton
- Macronix MX25L3273E to PREW (+PREW)
Reported by Roklobsta on IRC
- Macronix MX23L6454 to PR (+PR)
Reported by Steven Honeyman
- Macronix MX25U6435E/F to PREW (+PREW)
Reported by Marcos Truchado and Guillermo von Hünefeld
- PMC Pm25LQ032C to PREW (+EW)
Reported by Dirk Knop
- Spansion S25FL016A to PREW (+EW)
Reported by Márton Miklós
- Spansion S25FL128S......0 to PREW (+PREW)
Reported by Jim Houston
- Spansion S25FL204K to PR (+PR)
Reported by Thomas Debrunner
- SST SST49LF016C to PREW (+EW)
Reported by Steven Stremciuc
- SST SST39VF040 to PREW (+PREW)
Reported by Xavier Bourgeois
- SST SST49LF040B to PREW (+EW)
Reported by Rikard Åhlund
- ST M25P10-A to PREW (+W)
Reported by Martijn Schiedon
- Winbond W39V040FA to PREW (+EW)
Reported by Евгений Черкашин
- Winbond W39V080FA to PREW (+EW)
Reported by protagonist0 on IRC
- Winbond W25Q80.W to PREW (+PREW)
Reported by Miklós Márton
- Winbond W25X64 to PREW (+REW)
Reported by Johannes Krampf and Manuel Dejonghe
- Fix ID of AMIC A25LQ64
Reported by Roman Titov
- Fix page size of Spansion S25FL129P......1
Copy and paste error from the 128S uniform 256kB variant, probably.
- Add Micron/Numonyx phase-change memory IDs
Miscellaneous:
- Detect Android target OS.
No changes are required to build flashrom (excluding programmers
with NEED_PCI) on Android.
- Update rayerspi (spipgm) URL
- Fix max_data_write handling of at45db.
- Minor refinement of the README
- Mark board enable for the GA-K8NS variants as tested.
Tested by "nicolae788" on a board with socket 754.
- Mark "Multi-system" chassis as non-laptop case.
- Remove W836xx log requests.
We got enough (and no one is looking at them for the time being anyway).
- serprog: improve invalid reply error message, contributed by Urja Rannikko.
- Remove default include paths for MinGW.
- Disable implicit rules in the Makefile because we don't need them and they
just make the build (imperceptibly) slower.
- Enable our own strnlen() implementation not only on DJGPP but also if
HAVE_STRNLEN is not defined. This is needed to get older BSDs
(e.g. NetBSD 6.0, FreeBSD < 8.0) to work.
- Tiny other stuff.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1917 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Supported controllers are Promise PDC20262 (FastTrak66/Ultra66),
PDC20265 (FastTrak100 Lite/Ultra100), PDC20267 (FastTrak100/Ultra100).
At least the Ultra100 only has address lines A0-A14 wired up, limiting
addressable chip size to 32 kB. The flash chips mounted on those
controllers usually is 128 kB, i.e. parts of the flash chip are
inaccessible. As a workaround, the driver implicitly truncates the
size of all flash chips to 32 kB. Works well for the factory installed
flash.
Do NOT use as a generic programmer for chips >32 kB.
Signed-off-by: Joseph C. Lehner <joseph.c.lehner@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Urja Rannikko <urjaman@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1916 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Found by Coverity as "CID 1348465: Resource leaks".
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1915 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This won't work for the majority of relevant commands because they use the
$(shell) function and GNU make does not relay variables exported within the
makefile to their evironment.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Also, add a target to the makefile to build a flashrom.8.html with groff.
To fix some formatting issues this adds some indention commands as well.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1913 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This is loosly based on the following changes of chromiumos:
- flashrom: Add default pkg-config definition.
Change-Id: I28744af0fd2d2d0bcc4569a5fbef370321691267
- Fix FT2232 feature on static builds.
Change-Id: I70d4a7bda573b64cb18429a21792455b018c4cba
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1912 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Previously we have hid almost all error messages from called tools like
pkg-config or the compiler in the "configure" step. Only exceptions were
the library checks because Carl-Daniel felt it improved usability in
case of missing headers etc.
However, this makes the output of the makefile less readable and in
the case of pkg-config fallbacks the error messages are actually
expected. Instead of throwing a part of the detailed stderr outputs
of the tools into the face of the users and completely hiding
others, write all of them into a separate log file instead.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The parenthesis pushed the exports into a subshell thus made them useless.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1910 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Available baud rates obviously depend on driver support, but the
CBR_ defines used so far are basically only for backwards source
compatibility with Win16, so dont bother with them.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1909 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Previously, flashrom -p serprog didnt notice a completely missing dev=
string on Windows. Also, the error message shown if no device name
followed contained a misleading "/dev/...".
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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On USB-based serial connections (VCP) the requested baud rate usually
does not matter (much). Remove the arbitrary restriction and use whatever
default values the OS/hardware provides.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Urja Rannikko <urjaman@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1907 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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There is no good reason to abort earlier just because some options did
not stick. This should improve compatibility without negative effects. If
communication is affected by the missing flag(s) then we abort later
anyway.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Urja Rannikko <urjaman@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1906 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Change sp_openserport() to directly clear the O_NONBLOCK flag that
is potentially set by opening the device with O_NDELAY instead of
clearing ALL flags in serialport_config() unconditionally.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Urja Rannikko <urjaman@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1905 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Many distros no longer provide libftdi 0.2, and as a result,
programmers that depend on libftdi must be disabled to compile flashrom.
Luckily the libftdi API did not change significantly, so for our
purposes, we can simply use the newer headers and link to the newer
library if it is available.
Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1904 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Tested-by: Jose Luis León <zenky1@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1903 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Even if fwrite() succeeds the data is not necessarily out of the clib's buffers
and writing it eventually could fail. Even if the data is flushed out (explicitly by
fflush() or implicitly by fclose()) the kernel might still hold a buffer.
Previously we have ignored this to a large extent - even in important cases
like writing the flash contents to a file. The results can be truncated
images that would brick the respective machine if written back as is (though
flashrom would not allow that due to a size mismatch). flashrom would not
indicate the problem in any output - so far we only check the return value
of fwrite() that is not conclusive.
This patch checks the return values of all related system calls like fclose()
unless we only read the file and are not really interested in output errors.
In the latter case the return value is casted to void to document this fact.
Additionally, this patch explicitly calls fflush() and fsync() (on regular files only)
to do the best we can to guarantee the read image reaches the disk safely
and at least inform the user if it did not work.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Urja Rannikko <urjaman@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1902 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Apart from the strange ID (using Sanyo's vendor ID 0x62) the main
difference from the plain SST25WF series is that they lack op codes
0xAD (AAI Word program) and 0x52 (32K erase). The smallest version
does not support dual I/O operations either.
SST25WF080B was tested under Linux with spidev.
Tested-by: Ben Gardner <bgardner@wabtec.com>
Signed-off-by: Ben Gardner <bgardner@wabtec.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1901 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Seems to work on IBM SurePOS 700 and
IBM (now Toshiba) AnyPlace Kiosk Model 4838-310.
Tested-by: Jason Vannest <Jason_Vannest@abercrombie.com>
Tested-by: Rowlinson Mark <Mark.Rowlinson@uk.fujitsu.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1900 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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usleep() has been obsolete for quite a while.
The only target that uses it without alternative is DOS.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1899 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This is mostly achieved by fixing or refining the inclusion of header
files and replacing glibc-specific ifdefs with more generic ones.
- <sys/io.h>: Contains iopl(2) and x86 I/O port access functions (inb, outb etc).
Generally Linux-specific but also availble on debian/kFreeBSD.
Provided by glibc as well as musl and uclibc.
Include it if we are running Linux or if glibc is detected.
- <sys/fcntl.h>: should be (and is) replaced by <fcntl.h> (without the
"sys" prefix).
- <linux/spi/spidev.h>: Does not include all necessary headers, namely
_IOC_SIZEBITS that is used in the definition of
SPI_MSGSIZE is not brought in via <linux/ioctl.h>
but instead we relied so far on glibc's including
it via <sys/ioctl.h>. Change that to explicitly
including <linux/ioctl.h>.
- <endian.h>: Would also be available in musl but there is no easy way
to detect it so we do not try yet.
The bug report and initial patches were
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Some chips such as the ENE KB9012 internal flash require a write
granularity of 128 bytes.
Signed-off-by: Paul Kocialkowski <contact@paulk.fr>
Acked-by: Nico Huber <nico.h@gmx.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1897 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Use names for the commands and request types instead of magic
numbers and remove some of the unnecessary unexplained arguments.
Also, cleanup the nonsense code left over from RE. Most of it can
not be explained by official documentation and was recorded with
ancient firmware/software.
Based on the following chromiumos changes:
Change-Id: I80a0dcdf40eedc89da48fb2c54cd9d9fd13e6fa1
Change-Id: If61bac2c8194b3ec30a80422d871842c66f0cd74
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: David Hendricks <dhendrix@chromium.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The serprog protocol does only transmit 24 bit-wide address and ignores the
top 8 bit. This is fine as long as the underlying hardware ignores the latter
anyway (which is the case for parallel chips that even lack the respective pins).
FWH/LPC chips, however, operate on a full 32-bit (LPC) or 28-bit (FWH) address
space and would fail with the fallback mapping to NULL.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1895 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Previously we have used low-active macros (because the hardware and
old protocol were so too) and set every single LED explicitly although we
only used a limited number of combinations. Using an enumeration for
commonly used values instead makes things easier.
Based on the following chromiumos change:
Change-Id: Ie481a583e623cdc45e3649a4db69b15570f65a7b
Signed-off-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: David Hendricks <dhendrix@chromium.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1894 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Saying that manufacturer id 0x00 is an "unknown SPI chip"
just confuses people with external programmers without a
proper connection to a chip and makes them think flashrom
doesn't support the chip they're trying to use.
Also causes unnecessary -c requirement with a multiple-slot
(FWH/LPC and SPI) serprog device i was testing.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested with a W29EE512P-70 (PLCC32, 5V) found on an RTL8169 network card.
The ID for the chip was already in flashchips.h with the name W29C512A
and a note for "also W29EE512". The datasheets are almost identical.
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1892 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Steven Honeyman <stevenhoneyman@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1891 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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DirectHW provides prototypes for out[bwl] and in[bwl], but we still
need to define the respective OUT[BWL] and IN[BWL] binding macros.
Apparently this has been broken since r1864 (or January 2015).
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1890 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Namely GD25LQ40, GD25LQ80, GD25LQ16, GD25LQ64(B), GD25LQ128.
Signed-off-by: Roman Titov <titovroman@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1889 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1887 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested mainboards:
OK:
- Elitegroup GF7050VT-M
Reported by Alex
- Fujitsu D2724-A1x (used in ESPRIMO E5625)
Reported by Rainer Spillmann
- Teclast X98 Air 3G
Reported by Antonio Ospite
Flash chips:
- Fix MX25L6405(D) definition by splitting it.
Reported by Reggie McMurtrey
- Add Macronix MX25L..08E family and rearrange MX25L6436E.
- Pm49FL004 to PREW (+EW)
Reported by Georg Sauthoff
Miscellaneous:
- Add board enable for abit KN9 Ultra.
- Mark ARM-USB-OCD as working OK.
- Use "mobile devices" instead of "laptops" in output.
- Tiny other stuff.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Coverity has brought up the following problems:
mstarddc_spi_send_command():
- CID 1270702: bad comparison of malloced pointer 'cmd'.
- CID 1270701: a NULL pointer dereference possible because of above.
Simply checking the return value of malloc in a valid way fixes both problems.
mstarddc_spi_init():
- CID 1270699 and 1270700: Memory leak of i2c_device.
This patch revamps the function in various ways to fix these issues and some
other irritating bits.
It reduces scopes of variables where possible, pushes the code towards our
coding standards and introduces a label-based resource cleanup at the end.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Alexandre Boeglin <alex@boeglin.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Was implemented by SPARC newbies, does (cross-)compile but is not run-tested.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch was inspired by the code in AVRDude (open source Atmel AVR
programmer) to support the PICkit2 written by Doug Brown [1]. The
Dediprog code in flashrom was used as the template for this code with
some reference to the ft2232 code as well.
[1] - https://github.com/steve-m/avrdude/blob/master/pickit2.c
Signed-off-by: Justin Chevrier <jchevrier@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1881 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The way more elegant check for the header fails unfortunately on CentOS 4.9
because PCI_LIB_VERSION is not defined at all although the domain parameter
is present. This patch jumps through the hoops via an additional check in the
Makefile to determine if the function accepts 5 parameters (new version) or
not (old version).
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested mainboards:
OK:
- AOpen UK79G-1394 (used in EZ18 barebones)
Reported by Lawrence Gough
- ASUS M4N78 SE
Reported by Dima Veselov
- ASUS P5LD2-VM
Mark board enable as tested (reported by Dima Veselov)
- GIGABYTE GA-970A-UD3P (rev. 2.0)
Reported by trucmar on IRC
- GIGABYTE GA-990FXA-UD3 (rev. 4.0)
Reported by ROKO__ on IRC
- GIGABYTE GA-H77-DS3H (rev. 1.1)
Reported by Evgeniy Edigarev
- GIGABYTE GA-P55-USB3 (rev. 2.0)
Reported by Måns Thörnqvist
- MSI MS-7817 (H81M-E33)
Reported by Igor Kolker
Chipsets:
- Marked Intel Bay Trail (0x0f1c) as tested OK
Reported by Antonio Ospite
- Refine Intel IDs
* Add IDs for Braswell
* Add IDs for 9 Series PCHs (e.g. H97, Z97)
* Rename Wellsburg devices slightly
Flash chips:
- Atmel AT25DF041A to PREW (+PREW)
Reported by Tai-hwa Liang
- Atmel AT26DF161 to PREW (+EW)
Reported by Steve Shenton
- Atmel AT45DB011D to PREW (+PREW)
Reported by The Raven
- Atmel AT45DB642D to PREW (+PREW)
Reported by Mahesh Mokal
- Eon EN25F32 to PREW (+PREW)
Reported by Arman Khodabande
- Eon EN25F40 to PREW (+REW)
Reported by Jerrad Pierce
- Eon EN25QH16 to PREW (+EW)
Reported by Ben Johnson
- GigaDevice GD25Q20(B) to PREW (+PREW)
Reported by Gilles Aurejac
- Macronix MX25U6435E/F to PR (+PR)
Reported by Matt Taggart
- PMC Pm25LV512(A) to PREW (+PREW)
Reported by The Raven
- SST SST39VF020 to PREW (+PREW)
Reported by Urja Rannikko
- Winbond W25Q40.V to PREW (+EW)
Reported by Torben Nielsen
- Add E variants of MX25Lx006 (MX25L2006E, MX25L4006E, MX25L8006E).
- Add MX25L6465E variant.
- There was never a MX25L12805 AFAICT.
- Split MX25L12805 from models with the same ID but an additional 32 kB
eraser: MX25L12835F/MX25L12845E/MX25L12865E.
- Add a bunch of ST parallel NOR flash chip IDs.
Miscellaneous:
- Whitelist ThinkPad X200.
- Constify master parameter of register_master().
- Remove FEATURE_BYTEWRITES because it was never used at all.
- Refine hwseq messages and make them less prominent.
- Fix the yet unused PRIxCHIPADDR format string thingy.
- Fix copy&paste error in spi_prettyprint_status_register_bp().
Spotted by Pablo Cases.
- Add an additional SMBus controller revision to identify another Yangtze
model. Thanks to Dan Christensen for reporting this issue.
- dediprog: add missing include for stdlib.h.
This fixes (at least) building on FreeBSD and DragonflyBSD with gcc.
- Remove references to struct pci_filter from programmer.h.
It is only needed in internal.c where it has a complete type. Having
it in programmer.h provokes a warning by some old versions of gcc.
- Tiny other stuff.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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strnlen() is in POSIX 2008 but was a GNU extension up to glibc 2.10
requiring to define _GNU_SOURCE. This fixes compilation on CentOS 4.9.
Also, move our implementation of strnlen() that was added to support
DJGPP to helpers.c.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1878 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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libusb-win32 is using a different header file name (lusb0_usb.h) for
a while. Use that on Windows builds to make clear that this is
currently the correct header to include.
Hopefully this will change soonish by migrating away from libusb-0.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1877 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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In cross-compiler setups pkg-config often needs some help to
determine the correct libraries. This can be done for example by
setting PKG_CONFIG_LIBDIR to point to the directory where the
cross-compile .pc files are located. If PKG_CONFIG_LIBDIR was not
set already outside of the Makefile we set it according to LIBS_BASE
and add the respective path to the linker's rpath. This makes it
possible to easily cross-compile by only setting CC and LIBS_BASE on
the command line.
This patch also removes the explicit default for LIBS_BASE again
because it does not play well with this change and was a bad idea to
begin with.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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