| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
flashchips.c.
This allows to list yet unsupported chips easily.
First it tries to find the directory containing the files, then it uses sed to
extract the macro names of chips from flashchips.h, greps for them in
flashchips.c and prints it if it is not found.
If verbose mode is activated by giving at least one additional parameter
it prints the chip ID and comment following the macro definition too.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1654 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
| |
REed by roxfan and Michael Karcher, patch by Stefan Tauner.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1653 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
| |
This older (ST-branded) revision of M25P20 chip does not support RDID and
hence was not detected correctly. This patch adds a workaround similar
to M25P40-old.
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1652 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
| |
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1651 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Tested Mainboards:
OK:
- Acer V75-M (used in IBM Aptiva 2170-G)
http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html
- Acorp 6M810C
http://www.flashrom.org/pipermail/flashrom/2013-January/010433.html
- ASRock G31M-S rev 2.0
http://www.flashrom.org/pipermail/flashrom/2013-February/010538.html
- ASUS F1A75-V PRO
http://paste.flashrom.org/view.php?id=1528
- ASUS M5A97 (rev. 1.0)
http://www.flashrom.org/pipermail/flashrom/2013-February/010483.html
- ASUS P5KPL-AM IN/GB
http://www.flashrom.org/pipermail/flashrom/2013-January/010455.html
- GABYTE GA-H77M-D3H
http://www.flashrom.org/pipermail/flashrom/2013-February/010538.html
NOT OK:
- GIGABYTE GA-Z77MX-D3H
http://paste.flashrom.org/view.php?id=1529
http://paste.flashrom.org/view.php?id=1530
Tested flash chips:
- Winbond W25X10 to PREW (+PREW)
Reported on IRC(?)
- Eon EN25Q32(A/B) to PREW (+REW)
http://www.flashrom.org/pipermail/flashrom/2013-February/010533.html
- Eon EN25Q64 to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2013-January/010466.html
Miscellaneous:
- Fix superflouos line breaks in wiki mainboard and laptop output.
- Use the .nh (no hyphenation) command in the manpage to enforce
single-line URLs where useful.
- Reference the manpage (besides the Laptops wiki page) in the laptop warning.
- Minor output and whitespace fixes.
- Add Fidelix IDs.
- Add ISSE clones of PMC chips.
- Fix typo: EMST -> ESMT.
- Add ID of ESMT F25D08QA.
- Refine GigaDevice GD25Q series (missing voltages and comments).
- Use underscore instead of lower-case x as wildcard in Sharp chip names.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1650 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
control the transfer rate on the spi bus. The following rates are
available (in Hz):
375k, 750k, 1.5M, 2.18M, 3M, 8M, 12M and 24M
The original driver reinitializes the programmer after setting the
speed, so the initialization calls have moved into a new function
dediprog_setup() which is called twice.
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1649 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
- Add a new macro named IS_MACOSX to hwaccess.c and use it to enable iopl().
This was broken since r1638. This fix does *not* restore the very permissive
concept where iopl() was activated in an #else branch that was inplace before
r1638.
- Make printing the image file's size in flashrom.c platform independent.
Bonus: remove definitions of off64_t and lseek64 which are not necessary
anymore for about 1000 commits.
Thanks to SJ for reporting the issue and testing the solution.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1648 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Update MX25L512 with references to and data about
MX25L512E, MX25V512, MX25V512C.
Update MX25L1005 with references to and data about
MX25L1005C, MX25L1006E.
Update MX25L2005 with references to and data about
MX25L2005C.
Update MX25L4005 with references to and data about
MX25L4005A, MX25L4005C.
Update MX25L8005 with references to and data about
MX25V8005.
Bonus: add chip IDs of MX25U1635E, MX25U3235E/F, MX25U6435E/F.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1647 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
| |
Thanks to Idwer and clang for noticing these problems.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1646 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
| |
Fixup for r1638.
Thanks to Idwer Vollering for testing.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1645 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
pcidev_init() now returns struct pci_device * instead of a BAR stored in
PCI config space. This allows for real error checking instead of having
exit(1) everywhere in pcidev.c.
Thanks to Niklas Söderlund for coming up with the original error
handling patch which was slightly modified and folded into this patch.
Move the declaration of struct pci_device in programmer.h before the
first user.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1644 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
| |
Also, unify all outputs of "Warning:" and "Error:" to use normal
capitalization instead of mixing it with all capitals.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1643 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Previously the internal programmer used its own code to initialize pcilib.
This patch extracts the common code from the internal programmer and
pcidev_init() into pcidev_init_common().
This fixes the non-existent PCI cleanup of the internal programmer and adds
an additional safety by checking for an already existing PCI context.
We got a nice shutdown function registration infrastructure, but did not use it
very wisely. Instead we added shutdown functions to a myriad of programmers
unnecessarily. In this patch we get rid of those that do only call pci_cleanup(pacc)
by adding a shutdown function the pcidev.c itself that gets registered by
pcidev_init().
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1642 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
When working with some flash chips using the Bus Pirate programmer, the
use of the Bus Pirate's on-board pull-up resistors is sometimes
necessary.
On v3 hardware the use of said pull-up resistors requires the user to apply a
voltage to the VPU pin of the Bus Pirate, and then command it to use them.
For v4 hardware which supports also fixed internal 3.3V and 5V sources no
documentation could be found.
Here is a link to information pertaining to what this patch does:
http://dangerousprototypes.com/docs/SPI_(binary)#0100wxyz_-_Configure_peripherals_w.3Dpower.2C_x.3Dpull-ups.2C_y.3DAUX.2C_z.3DCS
Bonus: small cleanup of superfluous stack variables.
Signed-off-by: Brian Salcedo <bsalcedo@gmx.us>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Tested-by: Brian Salcedo <bsalcedo@gmx.us>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1641 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Tested Mainboards:
OK:
- Acer V75-M (used in IBM Aptiva 2170-G
http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html
- ASRock 4CoreDual-VSTA with W39V040FB
http://paste.flashrom.org/view.php?id=1446
- ASRock 775Dual-VSTA
http://www.flashrom.org/pipermail/flashrom/2012-December/010294.html
- ASRock E350M1/USB3
http://paste.flashrom.org/view.php?id=1465
- ASUS P5B-VM
http://www.flashrom.org/pipermail/flashrom/2012-December/010351.html
- ASUS SABERTOOTH 990FX R2.0
http://www.flashrom.org/pipermail/flashrom/2012-December/010210.html
- Elitegroup A928 (including a laptop whitelist board enable)
http://www.flashrom.org/pipermail/flashrom/2012-November/010119.html
- EVGA 122-CK-NF68
Reported by Stephanie Daugherty on IRC
http://paste.flashrom.org/view.php?id=1431
- GIGABYTE GA-A75M-UD2H
Reported by Soul_keeper on IRC
http://paste.flashrom.org/view.php?id=1490
- Intel D945GCNL
Add board enable to override laptop detection too.
http://www.flashrom.org/pipermail/flashrom/2012-December/010276.html
- MSI G33M (MS-7357)
http://www.flashrom.org/pipermail/flashrom/2012-October/010056.html
- Shuttle FB61
http://www.flashrom.org/pipermail/flashrom/2012-November/010105.html
- Tyan S4882 (Thunder K8QS Pro)
Reported on IRC
NOT OK:
Alienware Aurora-R2
http://www.flashrom.org/pipermail/flashrom/2012-December/010225.html
Biostar H61MU3
http://www.flashrom.org/pipermail/flashrom/2012-November/010144.html
Dell OptiPlex 7010
http://paste.flashrom.org/view.php?id=1481
Intel DH67CL
http://www.flashrom.org/pipermail/flashrom/2012-November/010112.html
Supermicro X9DRT-HF+
http://www.flashrom.org/pipermail/flashrom/2012-November/010155.html
Supermicro X9DRW
http://www.flashrom.org/pipermail/flashrom/2012-November/010150.html
Tested flash chips:
- Atmel AT25FS010 to PREW (+PREW)
http://paste.flashrom.org/view.php?id=1484
- Eon EN25F64 to PREW (+EW)
http://www.flashrom.org/pipermail/flashrom/2012-December/010210.html
- Spansion S25FL032A/P to PREW (+EW)
http://paste.flashrom.org/view.php?id=1510
- ST M29F002T/NT to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html
- Winbond W25X10 to PREW (+PREW)
http://paste.flashrom.org/view.php?id=1486
Tested chipsets:
- NVIDIA MCP78S http://www.flashrom.org/pipermail/flashrom/2012-November/010176.html
- SiS 650 http://www.flashrom.org/pipermail/flashrom/2012-November/010119.html
Miscellaneous:
- Typo in GA-X58A-UDR3 (correct is GA-X58A-UD3R).
- Force 2-digit hex numbers in prints were it makes sense.
- Share code between enable_flash_sis530() and enable_flash_sis540().
- Some SST 25 series chips support both WRSR enable commands...
- S25FL032A and S25FL064A share the IDs with their P versions, so rename them.
- Fix a few memleaks in serprog.
- Dediprog uses UINT_MAX so include limits.h (fixes the Windows build of dediprog)
- Add (another) hint regarding the mandatory -p parameter to the manpage
to make Debian bug #690478 happy.
http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=690478
- Fix whitespace issues.
- On shutdown, reset count of registered programmers (by Nico Huber)
- Fix atahpt.c shutdown.
The order of pcidev_init, register_shutdown and rpci_write_* is important!
Thanks to Roy for reporting the problem and testing the fix.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1640 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
| |
This makes some stuff const (partially to get a more convenient
libflashrom interface).
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1639 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Previously the code was focused on architectures which led to lots of
duplicate code and spread the information regarding differences between
the architectures accross the file.
With this patch there is a single function header for any function and the
differentiation between architectures (and OS where needed) happens
in one place for each function. Also, this patch adds simple defines to bundle
often used arch and os checks. A central check for unknown architectures
and OSes has been added on top.
Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1638 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This adds support for the following chips:
- AT25F512, AT25F512A, AT25F512B
- AT25F1024, AT25F1024A
- AT25F2048
- AT25F4096
Besides the definitions of the the chips in flashchips.c this includes
- a dedicated probing method (probe_spi_at25f)
- pretty printing methods (spi_prettyprint_status_register_at25f*), and
- unlocking methods (spi_disable_blockprotect_at25f*)
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1637 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This includes:
Bottom boot block:
* 16Mb/2MB:
QB25F160S33B8, QB25F016S33B8, QH25F160S33B8, QH25F016S33B8
* 32Mb/4MB:
QB25F320S33B8, QH25F320S33B8
* 64Mb/8MB:
QB25F640S33B8, QH25F640S33B8
Top boot block:
* 16Mb/2MB:
QB25F160S33T8, QB25F016S33T8, QH25F160S33T8, QH25F016S33T8
* 32Mb/4MB:
QB25F320S33T8, QH25F320S33T8
* 64Mb/8MB:
QB25F640S33T8, QH25F640S33T8
At least some seem to be marketed by other vendors (too?) but also with
Intel's vendor ID.
Besides a 0xC7 chip erase and a 0xD8 uniform 64kB block erase they
support also erasing the top/bottom 8 8kB blocks with opcode 0x40.
But since this command fails for all addresses outside those ranges,
it is not easily implemented with flashrom's current code base and
hence left out.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1636 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
| |
This does not only remove a huge pile of duplicate code, it does
also fix a bug in spi_disable_blockprotect_at25df(), which is also
a good example why duplicated code is a bad idea.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1635 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
- Move all functions related to SPI status registers to a new file
spi25_statusreg.c. This includes the generic as well as the
SST-specific functions from spi25.c and the chip-specific functions
from a25.c and at25.c.
- introduce helper functions
* spi_prettyprint_status_register_hex()
* spi_prettyprint_status_register_bpl()
* spi_prettyprint_status_register_plain()
Use the latter on every compatible flash chip that has no better printlock
function set and get rid of the implicit pretty printing in the SPI probing
functions.
- remove
* spi_prettyprint_status_register_common()
* spi_prettyprint_status_register_amic_a25lq032() because it can be fully
substituted with spi_prettyprint_status_register_amic_a25l032().
* spi_prettyprint_status_register() (old switch, no longer needed)
- promote and export
* spi_prettyprint_status_register_amic_a25l05p() as spi_prettyprint_status_register_default_bp1().
* spi_prettyprint_status_register_amic_a25l40p() as spi_prettyprint_status_register_default_bp2().
* spi_prettyprint_status_register_st_m25p() as spi_prettyprint_status_register_default_bp3().
- add #define TEST_BAD_REW and use it for a number of Atmel chips which
had only TEST_BAD_READ set even though they dont have erasers or a write
function set.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1634 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
| |
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1633 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Once upon a time usbdev_status was created for the ft2232
programmer. Its IDs are semantically different to pcidev_status
because they indicate USB instead of PCI IDs, but apart from that
both data structures are equal. This change makes life easier for
everything involved in handling and printing the status of devices
that is noted in those structures by combining them into dev_entry.
It is still possible to distinguish between PCI and USB devices
indirectly by using the struct programmer's type field.
Also, add a programmer column to the PCI and USB devices lists.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1632 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
To be able to get rid of lots of #ifdefs and centralize programmer-specific
data more...
- introduce two new fields to struct programmer_entry, namely
enum type (OTHER, USB, PCI) and union devs (pcidev_status, usbdev_status
or char *note).
- use those fields to generate device listings in print.c and print_wiki.c.
Bonus: add printing of USB devices to print_wiki.c and count supported PCI
and USB devices.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1631 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
| |
And remove the completely unused vendor field.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1630 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Frees the memory allocated for the following strings
- log file name
- layout file name
- image file name
- programmer parameter (and reset the associated global variable in flashrom.c)
Also, free the flashchip structs allocated by probe_flash.
The layout image names were not fixed due to the pending layout patches.
These bugs were found thanks to valgrind.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1629 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch adds a "device" parameter for Dediprog which enables use of
multiple dediprogs connected to a single machine. Very handy for test racks.
Example usage:
flashrom -p dediprog:device=0
flashrom -p dediprog:device=1
etc...
The patch was originally written by Nathan Laredo.
Thanks to David Hendricks for submitting it upstream.
Additional error handling, man page etc. by Stefan Tauner.
Signed-off-by: Nathan Laredo <nil@google.com>
Signed-off-by: David Hendricks <dhendrix@google.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1628 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
| |
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1627 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
| |
serialport_write could loop endlessly when used with a seemingly valid port
that does always return 0 on writes instead of an error.
Give up after about 125 ms i.e. 250 tries with a period of 500 us.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1626 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
| |
Spotted by Idwer Vollering.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1625 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
| |
More clear "variable" names, better explanation if no programmer is selected etc.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
| |
Avoid funny interactions between libpci and libusb detection.
Leave libftdi autodetection alone for now.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1623 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
| |
IDs are from the host bridge and LPC controller. The enable function
was reverse engineered by roxfan, thanks!
User mezzo vanished without reporting any test results.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1622 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
| |
newer.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1621 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
W39F010 is a 128kB parallel 5V flash chip, 16k bootblocks.
W39L010 is a 128kB parallel 3.3V flash chip, 8k bootblocks.
W39L020 is a 256kB parallel 3.3V flash chip, 64k/16k bootblocks.
The W39F010 code was tested with a satasii programmer. The first write
attempt after an erase returned with verify failure, but the second
write attempt was succesful:
http://paste.flashrom.org/view.php?id=1418
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1620 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Kyösti Mälkki noticed that we unnecessarily read the flash chip twice when
called with --verify. The first one is the mandatory read before everything
(to be able to detect the seriousness of errors), but the second one is not
necessary because we can just use the former for the comparison.
This introduces a small output change: previously we printed ERASE or
VERIFY depending on the callee. This special case has been dropped
because it is unnecessary to print it (and wrong for the verification
function to need to know why it is verifying exactly).
If an erase fails we mention that fact explicitly already, similar for verify.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1619 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
| |
This allowed me to let the clips remain attached on my D946GZIS while
playing with coreboot/serialice.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1618 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
| |
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1617 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Wicked chip: No WRSR, no write enable command (but swallows our
default one without a problem), supports an auto-erasing page write
(but even without that page writes are recommended to write the
whole page i.e. operate on a completely erased page), mad
requirements on block refreshments if only partly written.
Found on my Intel D946GZIS and tested with my serprog in situ.
Using the page write by setting JEDEC_BYTE_PROGRAM to 0x11 and using
the spi_chip_write_256 command greatly improves performance and works
flawlessly.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1616 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The 32Mb version has 1.8V and 3.0V versions, the smaller one 1.8V only
(or Numonyx/Micron forgot to publish it). Another difference is that the
16Mb chip has 32 kB subsectors (erase opcode 0x52). As long as there
are no funky configurations like for the 128Mb chips, we got the smaller
parts covered with this change.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
| |
Propagate the error code using return values instead, but let cli_classic.c
still decide the ultimate return value of the process.
Also, remove setting the ret value again after print_supported_wiki() -
success is the default.
Signed-off-by: Niklas Söderlund <niso@kth.se>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1614 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Tested Mainboards:
OK:
- Foxconn P55MX
http://www.flashrom.org/pipermail/flashrom/2012-October/010002.html
Tested flash chips:
- Eon EN25F64 to PR (+PR)
http://paste.flashrom.org/view.php?id=1426
- Macronix MX25L1005 to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2012-October/010004.html
- Set SST39VF512 to PREW (+W)
http://www.flashrom.org/pipermail/flashrom/2012-September/009958.html
Tested chipsets:
- Z77 (only reading was really tested)
Miscellaneous:
- Fix ft2232_spi's parameter parsing.
- Fix nicrealtek's init (always segfaulted since r1586 oops).
- Add another T60 variant to the laptop whitelist.
- Improve message shown when image file size does not match flash chip
- Refine messages regarding the flash descriptor override strap according
to the findings by Vladislav Bykov on his P55MX.
- Fix the ID of EN25F64.
- Demote and clarify debug message in serprog_delay().
- Minor other cleanups.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1613 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This patch differentiates between the N25Q064 1.8V version and 3.0V
version which have different JEDEC IDs.
It extends the chip name to include more characters of the part
number. The first two of those characters indicate the process
technology (65nm) and feature set (hold pin etc.), neither of which
matter for flashrom at the moment. The third and fourth characters
specify voltage and block/sector size and uniformity, which are
important and hence included.
To abstract the irrelevant portions of the part number leading up to
the characters we care about, dots are used. This helps prevent
unwanted changes in chip name that can break fragile scripts and
confuse people. More about this schema here:
http://www.flashrom.org/pipermail/flashrom/2012-July/009595.html
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1612 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
| |
This includes SST25WF512, SST25WF010, SST25WF020 and SST25WF040.
They require a VCC of 1.65 - 1.95V, which is why i could not test them.
The SOIC version of the SST25WF512 is used on an AMD X300-based
graphics card i own.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1611 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
| |
- Use libftdi's error string to add more detail.
- Add full stops to messages.
- Minor white space fixes.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1610 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
| |
For older versions of libftdi we define TYPE_232H ourselves and this
seems to be enough to get at least basic support (and we don't need
more than that AFAICT).
Signed-off-by: Ilya A. Volynets-Evenbakh <ilya@total-knowledge.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1609 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Add a check to validate the selected channel/interface, which not even
libftdi seems to do yet.
This patch changes default behavior: the new default channel/interface is A.
Also, this patch uses the word 'channel' in addition or in place of 'interface'
where possible without too much hassle because it is the term FTDI uses.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1608 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
| |
Heavily influenced by a discussion with (and based on code from) Peter Stuge.
Please read the comment in the Makefile before using this option.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
This should get rid of the need to specify the laptop force
parameter on T60 and X60 series Thinkpads (including T60s and X60s)
that are using one of the Intel 94x northbridges and are known to have
no interfering EC. Please note that although the EC is no problem, flashrom
is not able to access the entire flash chip with the vendor BIOS, see the
coreboot wiki for details: http://www.coreboot.org/Lenovo_x60x
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Paul Menzel <paulepanter@users.sourceforge.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1606 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
In r1577 we removed the discrimination of coreboot IDs and user-specified
mainboards. The problem is that the board enable code required to find
a board enable if either of these model strings were set. Therefore boards
running coreboot that do not need a board enable failed to execute flashrom
since then. This patch fixes this by handling coreboot IDs and user-supplied
IDs differently again.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1605 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|