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* Add support for Sanyo LE25FU406C/LE25U40CMC.stefanct2015-12-252-0/+38
| | | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Tested-by: Jose Luis León <zenky1@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1903 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Rigorously check integrity of I/O stream data.stefanct2015-12-253-26/+50
| | | | | | | | | | | | | | | | | | | | | | | | | Even if fwrite() succeeds the data is not necessarily out of the clib's buffers and writing it eventually could fail. Even if the data is flushed out (explicitly by fflush() or implicitly by fclose()) the kernel might still hold a buffer. Previously we have ignored this to a large extent - even in important cases like writing the flash contents to a file. The results can be truncated images that would brick the respective machine if written back as is (though flashrom would not allow that due to a size mismatch). flashrom would not indicate the problem in any output - so far we only check the return value of fwrite() that is not conclusive. This patch checks the return values of all related system calls like fclose() unless we only read the file and are not really interested in output errors. In the latter case the return value is casted to void to document this fact. Additionally, this patch explicitly calls fflush() and fsync() (on regular files only) to do the best we can to guarantee the read image reaches the disk safely and at least inform the user if it did not work. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Urja Rannikko <urjaman@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1902 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for SST SST25WF020A, SST25WF040B, SST25WF080B.stefanct2015-11-224-5/+125
| | | | | | | | | | | | | | | | Apart from the strange ID (using Sanyo's vendor ID 0x62) the main difference from the plain SST25WF series is that they lack op codes 0xAD (AAI Word program) and 0x52 (32K erase). The smallest version does not support dual I/O operations either. SST25WF080B was tested under Linux with spidev. Tested-by: Ben Gardner <bgardner@wabtec.com> Signed-off-by: Ben Gardner <bgardner@wabtec.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1901 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for VIA VT8251.stefanct2015-11-211-0/+1
| | | | | | | | | | | | | Seems to work on IBM SurePOS 700 and IBM (now Toshiba) AnyPlace Kiosk Model 4838-310. Tested-by: Jason Vannest <Jason_Vannest@abercrombie.com> Tested-by: Rowlinson Mark <Mark.Rowlinson@uk.fujitsu.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1900 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Use nanosleep() instead of usleep() where available.stefanct2015-11-141-1/+4
| | | | | | | | | | usleep() has been obsolete for quite a while. The only target that uses it without alternative is DOS. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1899 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add (implicit) support for musl libc.stefanct2015-11-142-8/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | This is mostly achieved by fixing or refining the inclusion of header files and replacing glibc-specific ifdefs with more generic ones. - <sys/io.h>: Contains iopl(2) and x86 I/O port access functions (inb, outb etc). Generally Linux-specific but also availble on debian/kFreeBSD. Provided by glibc as well as musl and uclibc. Include it if we are running Linux or if glibc is detected. - <sys/fcntl.h>: should be (and is) replaced by <fcntl.h> (without the "sys" prefix). - <linux/spi/spidev.h>: Does not include all necessary headers, namely _IOC_SIZEBITS that is used in the definition of SPI_MSGSIZE is not brought in via <linux/ioctl.h> but instead we relied so far on glibc's including it via <sys/ioctl.h>. Change that to explicitly including <linux/ioctl.h>. - <endian.h>: Would also be available in musl but there is no easy way to detect it so we do not try yet. The bug report and initial patches were Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@trabucayre.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for 128 bytes write granularity.stefanct2015-10-162-0/+7
| | | | | | | | | | Some chips such as the ENE KB9012 internal flash require a write granularity of 128 bytes. Signed-off-by: Paul Kocialkowski <contact@paulk.fr> Acked-by: Nico Huber <nico.h@gmx.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1897 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* dediprog: Tidy up commands and remove dead nonsense code.stefanct2015-07-051-254/+136
| | | | | | | | | | | | | | | | | | | Use names for the commands and request types instead of magic numbers and remove some of the unnecessary unexplained arguments. Also, cleanup the nonsense code left over from RE. Most of it can not be explained by official documentation and was recorded with ancient firmware/software. Based on the following chromiumos changes: Change-Id: I80a0dcdf40eedc89da48fb2c54cd9d9fd13e6fa1 Change-Id: If61bac2c8194b3ec30a80422d871842c66f0cd74 Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: David Hendricks <dhendrix@chromium.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1896 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* serprog: Fix FWH/LPC by implementing serprog_map.stefanct2015-06-293-1/+18
| | | | | | | | | | | | | The serprog protocol does only transmit 24 bit-wide address and ignores the top 8 bit. This is fine as long as the underlying hardware ignores the latter anyway (which is the case for parallel chips that even lack the respective pins). FWH/LPC chips, however, operate on a full 32-bit (LPC) or 28-bit (FWH) address space and would fail with the fallback mapping to NULL. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1895 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* dediprog: Invert the LED polarity in the code.stefanct2015-06-281-49/+42
| | | | | | | | | | | | | | | | | Previously we have used low-active macros (because the hardware and old protocol were so too) and set every single LED explicitly although we only used a limited number of combinations. Using an enumeration for commonly used values instead makes things easier. Based on the following chromiumos change: Change-Id: Ie481a583e623cdc45e3649a4db69b15570f65a7b Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: David Hendricks <dhendrix@chromium.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1894 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* spi25: ignore 0x00 as a manufacturer id in the generic match.stefanct2015-06-221-2/+2
| | | | | | | | | | | | | | Saying that manufacturer id 0x00 is an "unknown SPI chip" just confuses people with external programmers without a proper connection to a chip and makes them think flashrom doesn't support the chip they're trying to use. Also causes unnecessary -c requirement with a multiple-slot (FWH/LPC and SPI) serprog device i was testing. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1893 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for Winbond W29C512A/W29EE512.stefanct2015-06-201-0/+24
| | | | | | | | | | | Tested with a W29EE512P-70 (PLCC32, 5V) found on an RTL8169 network card. The ID for the chip was already in flashchips.h with the name W29C512A and a note for "also W29EE512". The datasheets are almost identical. Signed-off-by: Urja Rannikko <urjaman@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1892 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for PMC Pm25LQ020, Pm25LQ040, Pm25LQ080, Pm25LQ016, Pm25LQ032C.stefanct2015-06-022-1/+201
| | | | | | | | Signed-off-by: Steven Honeyman <stevenhoneyman@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1891 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* hwaccess.h: fix compilation on OSX.stefanct2015-05-231-6/+6
| | | | | | | | | | | | DirectHW provides prototypes for out[bwl] and in[bwl], but we still need to define the respective OUT[BWL] and IN[BWL] binding macros. Apparently this has been broken since r1864 (or January 2015). Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1890 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for more GigaDevice GD25LQ chips.stefanct2015-04-031-2/+197
| | | | | | | | | Namely GD25LQ40, GD25LQ80, GD25LQ16, GD25LQ64(B), GD25LQ128. Signed-off-by: Roman Titov <titovroman@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1889 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Increase flashrom version number to 0.9.8.stefanct2015-03-011-1/+1
| | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1887 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add a bunch of new/tested stuff and various small changes 23.stefanct2015-03-017-33/+81
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - Elitegroup GF7050VT-M Reported by Alex - Fujitsu D2724-A1x (used in ESPRIMO E5625) Reported by Rainer Spillmann - Teclast X98 Air 3G Reported by Antonio Ospite Flash chips: - Fix MX25L6405(D) definition by splitting it. Reported by Reggie McMurtrey - Add Macronix MX25L..08E family and rearrange MX25L6436E. - Pm49FL004 to PREW (+EW) Reported by Georg Sauthoff Miscellaneous: - Add board enable for abit KN9 Ultra. - Mark ARM-USB-OCD as working OK. - Use "mobile devices" instead of "laptops" in output. - Tiny other stuff. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix a number of problems in mstarddc_spi.c.stefanct2015-02-181-25/+28
| | | | | | | | | | | | | | | | | | | | | | | Coverity has brought up the following problems: mstarddc_spi_send_command(): - CID 1270702: bad comparison of malloced pointer 'cmd'. - CID 1270701: a NULL pointer dereference possible because of above. Simply checking the return value of malloc in a valid way fixes both problems. mstarddc_spi_init(): - CID 1270699 and 1270700: Memory leak of i2c_device. This patch revamps the function in various ways to fix these issues and some other irritating bits. It reduces scopes of variables where possible, pushes the code towards our coding standards and introduces a label-based resource cleanup at the end. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Alexandre Boeglin <alex@boeglin.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1885 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Increase flashrom version number to 0.9.8-rc1.stefanct2015-02-111-1/+1
| | | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1883 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for SPARC (maybe).stefanct2015-02-104-6/+33
| | | | | | | | | Was implemented by SPARC newbies, does (cross-)compile but is not run-tested. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for the Microchip PICkit2 as an SPI programmer.stefanct2015-02-085-4/+582
| | | | | | | | | | | | | | | This patch was inspired by the code in AVRDude (open source Atmel AVR programmer) to support the PICkit2 written by Doug Brown [1]. The Dediprog code in flashrom was used as the template for this code with some reference to the ft2232 code as well. [1] - https://github.com/steve-m/avrdude/blob/master/pickit2.c Signed-off-by: Justin Chevrier <jchevrier@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1881 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Refine version check of libpci function pci_get_dev.stefanct2015-02-082-1/+29
| | | | | | | | | | | | | The way more elegant check for the header fails unfortunately on CentOS 4.9 because PCI_LIB_VERSION is not defined at all although the domain parameter is present. This patch jumps through the hoops via an additional check in the Makefile to determine if the function accepts 5 parameters (new version) or not (old version). Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add a bunch of new/tested stuff and various small changes 22.stefanct2015-02-0816-119/+220
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested mainboards: OK: - AOpen UK79G-1394 (used in EZ18 barebones) Reported by Lawrence Gough - ASUS M4N78 SE Reported by Dima Veselov - ASUS P5LD2-VM Mark board enable as tested (reported by Dima Veselov) - GIGABYTE GA-970A-UD3P (rev. 2.0) Reported by trucmar on IRC - GIGABYTE GA-990FXA-UD3 (rev. 4.0) Reported by ROKO__ on IRC - GIGABYTE GA-H77-DS3H (rev. 1.1) Reported by Evgeniy Edigarev - GIGABYTE GA-P55-USB3 (rev. 2.0) Reported by Måns Thörnqvist - MSI MS-7817 (H81M-E33) Reported by Igor Kolker Chipsets: - Marked Intel Bay Trail (0x0f1c) as tested OK Reported by Antonio Ospite - Refine Intel IDs * Add IDs for Braswell * Add IDs for 9 Series PCHs (e.g. H97, Z97) * Rename Wellsburg devices slightly Flash chips: - Atmel AT25DF041A to PREW (+PREW) Reported by Tai-hwa Liang - Atmel AT26DF161 to PREW (+EW) Reported by Steve Shenton - Atmel AT45DB011D to PREW (+PREW) Reported by The Raven - Atmel AT45DB642D to PREW (+PREW) Reported by Mahesh Mokal - Eon EN25F32 to PREW (+PREW) Reported by Arman Khodabande - Eon EN25F40 to PREW (+REW) Reported by Jerrad Pierce - Eon EN25QH16 to PREW (+EW) Reported by Ben Johnson - GigaDevice GD25Q20(B) to PREW (+PREW) Reported by Gilles Aurejac - Macronix MX25U6435E/F to PR (+PR) Reported by Matt Taggart - PMC Pm25LV512(A) to PREW (+PREW) Reported by The Raven - SST SST39VF020 to PREW (+PREW) Reported by Urja Rannikko - Winbond W25Q40.V to PREW (+EW) Reported by Torben Nielsen - Add E variants of MX25Lx006 (MX25L2006E, MX25L4006E, MX25L8006E). - Add MX25L6465E variant. - There was never a MX25L12805 AFAICT. - Split MX25L12805 from models with the same ID but an additional 32 kB eraser: MX25L12835F/MX25L12845E/MX25L12865E. - Add a bunch of ST parallel NOR flash chip IDs. Miscellaneous: - Whitelist ThinkPad X200. - Constify master parameter of register_master(). - Remove FEATURE_BYTEWRITES because it was never used at all. - Refine hwseq messages and make them less prominent. - Fix the yet unused PRIxCHIPADDR format string thingy. - Fix copy&paste error in spi_prettyprint_status_register_bp(). Spotted by Pablo Cases. - Add an additional SMBus controller revision to identify another Yangtze model. Thanks to Dan Christensen for reporting this issue. - dediprog: add missing include for stdlib.h. This fixes (at least) building on FreeBSD and DragonflyBSD with gcc. - Remove references to struct pci_filter from programmer.h. It is only needed in internal.c where it has a complete type. Having it in programmer.h provokes a warning by some old versions of gcc. - Tiny other stuff. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1879 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Make strnlen() visible in old versions of glibc.stefanct2015-01-273-10/+20
| | | | | | | | | | | | strnlen() is in POSIX 2008 but was a GNU extension up to glibc 2.10 requiring to define _GNU_SOURCE. This fixes compilation on CentOS 4.9. Also, move our implementation of strnlen() that was added to support DJGPP to helpers.c. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1878 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Properly include current libusb-win32 header.stefanct2015-01-262-0/+13
| | | | | | | | | | | | | | libusb-win32 is using a different header file name (lusb0_usb.h) for a while. Use that on Windows builds to make clear that this is currently the correct header to include. Hopefully this will change soonish by migrating away from libusb-0. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1877 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Let pkg-config work with cross-compilers.stefanct2015-01-261-4/+6
| | | | | | | | | | | | | | | | | | | | In cross-compiler setups pkg-config often needs some help to determine the correct libraries. This can be done for example by setting PKG_CONFIG_LIBDIR to point to the directory where the cross-compile .pc files are located. If PKG_CONFIG_LIBDIR was not set already outside of the Makefile we set it according to LIBS_BASE and add the respective path to the linker's rpath. This makes it possible to easily cross-compile by only setting CC and LIBS_BASE on the command line. This patch also removes the explicit default for LIBS_BASE again because it does not play well with this change and was a bad idea to begin with. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1876 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix "unterminated variable reference" on ancient versions of GNU make.stefanct2015-01-251-1/+3
| | | | | | | | | | | Add a workaround for the GNU make that shipped with CentOS 4.9, which apparently does not like semicolons in shell code (and which also ignores info functions altogether by the way). Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1875 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Shadowing fix in nicintel_eeprom.c for ancient libpci.stefanct2015-01-251-8/+8
| | | | | | | | | | | Very old versions (<2.2) of pciutils had a typedef named "word" in types.h. That does not play well with previous local variable names of nicintel_eeprom.c. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* ftdi2232_spi: revert usage of DIS_DIV_5 macro.stefanct2015-01-251-1/+1
| | | | | | | | | | | | | | In r1872 we replaced some magic values with constant macros from ftdi.h. Among them was DIS_DIV_5 that represents the opcode that disables the use of the 5x prescaler on newer devices. Unfortunately this macro was only introduced with support for FT232H and hence is not available in older versions of the library. Revert back to using the magic constant. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1873 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* ft2232_spi.c: use constants from ftdi.h instead of magic numbers.stefanct2015-01-251-10/+20
| | | | | | | | | | Also, improve documentation of static variables cs_bits and pindir. Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1872 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix the --mainboard parameter that controls board enables.stefanct2015-01-241-7/+11
| | | | | | | | | | | | We refactored board_match_name()/--mainboard handling in r1577 and apparently broke it because since then we were always comparing to the respective coreboot values of board and vendor names instead of the user-supplied strings. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1871 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for Eon EN25P Series.stefanct2015-01-242-28/+275
| | | | | | | | | | | | | | | | | | | | | | | These are very similar to Eon's EN25B series but unlike those the EN25P has uniform sectors (of 32 and 64 kB). They can not be distinguished by RDID alone but the RES and REMS IDs are different and hence could be detected eventually in the future. This patch also refines tiny bits of the EN25B series. The series includes: - EN25P05 - EN25P10 - EN25P20 - EN25P40 - EN25P80 - EN25P16 - EN25P32 - EN25P64 Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Allow to easily build all optional modules.stefanct2015-01-191-0/+7
| | | | | | | | | | | | | | | | This patch adds a CONFIG_EVERYTHING flag to the Makefile that sets all CONFIG_* flags to "yes" if they were "no". This provides a comfortable way to ensure maximum code exposure to tools like coverity[0] or clang's scan-build. [0] https://scan.coverity.com/projects/1020 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix support for Macronix MX25L6495F.stefanct2015-01-101-0/+1
| | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1868 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for Macronix MX25L6495F.stefanct2015-01-102-0/+38
| | | | | | | | | | This is based on the code sent to the flashrom mailing list by Alex Lu (alexlu6@mxic.com.tw) without sign-off. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Refinements for DragonflyBSD.stefanct2015-01-104-15/+11
| | | | | | | | | | | | | - /usr/include/cpu/param.h defines PAGE_MASK already, hence use another name for the respective macro in nicintel_eeprom.c. - Since DragonflyBSD 3.6 DPorts is used as the default package manager. Therefore we should use /usr/local/ instead of /usr/pkg/ on default to fetch libraries. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1866 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Remove defaults for CC and AR.stefanct2015-01-101-2/+0
| | | | | | | | | | | | | AR defaults to "ar" anyway in GNU make and instead of gcc it is probably a better idea to use just cc. The latter allows to build on freebsd 10 without overriding CC or doing symlink tricks (because it uses clang as cc, provides multiple gcc packages but only versioned binaries without any actual "gcc" command name in the path). Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1865 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Unify target OS and CPU architecture checks.stefanct2015-01-1015-115/+163
| | | | | | | | | | | | | | | | | | | | | | We do CPU architecture checks once for the makefile in arch.h and once for HW access abstraction in hwaccess.c. This patch unifies related files so that they can share the checks to improve maintainability and reduce the chance of inconsistencies. Furthermore, it refines some of the definitions, which - adds "support" for AARCH64 and PPC64, - adds big-endian handling on arm as well as LE handling on PPC64, - fixes compilation of internal.c on AARCH64 and PPC64. Additionally, this patch continues to unify all OS checks in flashrom by adding a new helper macro IS_WINDOWS. The old header file for architecture checking is renamed to platform.h to reflect its broader scope and all new macros are add in there. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1864 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Allow to easily set a global path prefix for libraries and include files.stefanct2015-01-102-13/+9
| | | | | | | | | Gets rid of a few DOS-specific Makefile hacks. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1863 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Refine revision handling.stefanct2015-01-102-2/+17
| | | | | | | | | | | | | Up to now, when compiling flashrom outside a VCS it would print two warnings that are not very clear to the user. This patch adds a new auxilary function to getrevision.sh and uses it in the makefile to print a single and more meaningful message to the user while hiding the warnings from getrevision.sh. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1862 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix wrong density encoding on Intel Silvermont.stefanct2015-01-052-30/+26
| | | | | | | | | | | | | | Silvermont (Bay Trail, Rangeley, Avoton) seems to still use the old density encoding with 3 bits per chip. Documentation is unavailable (held concealed by Intel) but thanks to the efforts of Tai-Hong (Type) Wu the layout is clear now. This patch is based on his one but solves the issue differently thus reducing the code complexity. Signed-off-by: Tai-Hong Wu <thwu@lunartoday.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1861 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for the MSTAR I2C ISP protocol.stefanct2014-12-205-0/+339
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | Basically, among other chips, MSTAR manufactures SoCs that equip TV sets and computer screens, and it seems that all of their products use the same in-system programming protocol. Basically, they use the DDC channel of VGA or DVI connectors, which is actually an I2C bus, to encapsulate SPI frames (the flash chip is connected to the SoC through an SPI bus). I wrote this patch since the screen I bought had a software bug, and the manufacturer only released a new firmware binary, but no tool or instructions on flashing it. More details can be found here: http://boeglin.org/blog/index.php?entry=Flashing-a-BenQ-Z-series-for-free(dom) I only read code from Linux kernel archives published by Acer to figure out the protocol (for a touchscreen controller and an NFC chip, both by MSTAR, that share the same ISP protocol), so I don't think there are any legal problems with it. Compilation is currently disabled by default in the Makefile. If in doubt, additional Makefile bugs were added by Stefan. Signed-off-by: Alexandre Boeglin <alex@boeglin.org> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix handling of write protection at register space address +2.stefanct2014-12-202-41/+53
| | | | | | | | | | | | | | | Since r1833 we added the offset of the virtual register in several functions, which produced segfaults. This patch renames a few parameters and reorganizes/fixes various parts of the changelock_regspace2_block() function - hence the rather big diff. Thanks to Roman Lebedev for reporting this issue and testing numerous revisions of this patch. Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1859 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for Spansion S25FL127S.stefanct2014-12-123-3/+80
| | | | | | | | | | | | | | | | | | | | | | This flash chip can be configured (one time) to use 64 KiB or 256 KiB sectors. Additionally, in the 64 KiB mode it supports 16 4 KiB sub-sectors that can be (one time) programmed to be on the top or bottom of the device. The sub-sectors can be erased with the 0x20 opcode but because this opcode does not work with the remaining sectors and flashrom can not cope with that the 0x20 opcode is not supported yet. This patch adds two definitions, one for the 64 KiB and 256 KiB configuration respectively. The device also shares the RDID with the various S25FL128 devices so we have to increase the maximum number of successfully probed chips to 8. The 64 KiB mode was tested on real hardware. Signed-off-by: Jernej Škrabec <jernej.skrabec@planet.si> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for Eon EN29LV040 and EN29LV040A.stefanct2014-12-072-1/+28
| | | | | | | | | | Both use the same ID and are mostly identical. Tested-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1857 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for Intel 82599 10 GbE NICs.stefanct2014-12-051-2/+23
| | | | | | | | | | | | | | | | | | | The Intel 82599 series of 10 GbE controllers has a bit-banged SPI interface that's register-compatible with the one in the 1 GbE controllers, except the register addresses are shifted up by 0x10000, cf. Intel document 331520: http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/82599-10-gbe-controller-datasheet.pdf This patch was tested with a board that has the 0x10fc device and a Micron M25P40 SPI flash chip. The PCI IDs and names for the devices are per Intel document 331521 https://www-ssl.intel.com/content/dam/www/public/us/en/documents/specification-updates/82599-10-gbe-controller-spec-update.pdf and the PCI SIG device ID registry with small refinements. Signed-off-by: Ed Swierk <eswierk@skyportsystems.com> Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1856 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add board enable for GIGABYTE GA-8SIMLFS 2.0.stefanct2014-11-302-0/+3
| | | | | | | | | | | This board was used/sold by Fujitsu. The board enabled was tested (sadly with the wrong image, i.e. one of the GA-8SIMLH images directly from GIGABYTE instead of one from Fujitsu). Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1855 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* cbtable.c: Do not unnecessarily duplicate strings.stefanct2014-11-011-8/+4
| | | | | | | | | | | | The strdup calls were a leftover that slipped through the cleanup in r1577. Found-by: Valgrind 3.10.0 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1854 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Move strtok_r implementation verbatim to helpers.c.stefanct2014-11-013-21/+24
| | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1853 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* dmi.c: make sure we call isprint() correctly.stefanct2014-10-191-1/+1
| | | | | | | | | | | ISO C and POSIX require to call ctype functions with values representable by unsigned char. We have used a char as input so far which might be negative and hence get sign-extended. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1852 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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