| Commit message (Collapse) | Author | Age | Files | Lines |
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SPI flash programmer. The project is in the the process of designing
and making a complete, open source, graphics card.
More info at http://wiki.opengraphics.org.
The first development card is a PCI add in card containing a couple of
FPGAs and a couple of serial flash chips (amongst other things). The
FPGAs are called XP10 and S3 (their part numbers). The XP10 contains
its own flash and does not need to be programmed by flashrom - it
ensures that the device can enumerate on the PCI bus without needing
further configuration.
The larger FPGA is the S3. This is configured from a large SPI flash
(2 MBytes). The second SPI flash is used to store the VGA BIOS. It
is smaller (128 KBytes). This patch adds support for programming either
of the two SPI flash chips.
The programmer device takes one configuration option which selects which
of the two flash chips is accessed. This must be set to either "cprom"
or "bprom". (The project refers to the two chips as "cprom" / "bprom",
"s3" and "bios" are more readable alternatives).
Add support for SST SST25VF010 (REMS).
Mark SST SST25VF016B as tested for write.
Signed-off-by: Mark Marshall <mark.marshall@csr.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1241 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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perform the actual write (inner functions).
The signature of the write wrappers is:
int write_chip(struct flashchip *flash, uint8_t * buf);
The signature of the inner write functions varied a lot. This patch
changes them to:
int write_part(struct flashchip *flash, uint8_t *src, int start, int len);
Did you know that flashrom has only 8 inner write functions for all
flash chips?
write_page_write_jedec_common
write_sector_jedec_common
write_sector_28sf040
spi_chip_write_256_new
spi_chip_write_1_new
spi_aai_write_new
write_page_82802ab
write_page_m29f400bt
Export all inner write functions.
Change the function signature of wait_82802ab to eliminate single-use
variables.
Remove an error message in write_page_m29f400bt which was printed for
every byte written regardless of success.
Add sharplhf00l04.c to the list of flash chip drivers in the Makefile.
While the functions in there are unused, I suspect we will need them
later, and by hooking the file up we ensure that compilation won't
break.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1208 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1204 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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default.
Wiki output was missing all flash chips if CONFIG_INTERNAL was not
selected.
Use correct type for toupper()/tolower()/isspace() functions.
Specify software requirements in a generic way.
Non-x86 compilation does not work with the default programmer set, so
list the make parameters which result in a working build.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1203 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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people can find it via an internet search. DirectIO was a generic name
for a concept and thus not a good distinguisher for a library.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1198 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested on a 82541PI (0x8086, 0x107c) using 32-bit hardware.
The last line in nicintel_request_spibus() could be changed so that FL_BUSY
is used instead.
Shortened sample log:
[...]
Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:03.0).
Found chip "ST M25P10.RES" (128 KB, SPI) at physical address 0xfffe0000.
Multiple flash chips were detected: M25P05.RES M25P10.RES
Please specify which chip to use with the -c <chipname> option.
[...]
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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support.
Huge thanks go to Michael Karcher for reverse engineering the interface
and to Johannes Sjölund for testing the first iterations of my patch on
his hardware until it worked.
Thanks to the following testers of the patch:
* MCP61, 10de:03e0, LPC OK, ECS Geforce6100SM-M, Andrew Cleveland
* MCP61, 10de:03e0, LPC OK, Biostar NF520-A2 NF61D-A2, Vitaliy Buchynskyy
* MCP65, 10de:0441, SPI OK, MSI MS-7369 K9N Neo-F v2, Kjell Braden
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Wolfgang Schnitker
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Johannes Sjölund
* MCP65, 10de:0441, SPI OK, MSI MS-7369, Melchior Franz
* MCP78S, 10de:075c, SPI OK, Asus M3N78 PRO, Brad Rogers
* MCP78S, 10de:075c, SPI OK, Asus M3N78-VM, Marcel Partap
* MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Kimmo Vuorinen
* MCP78S, 10de:075c, SPI OK, Asus M4N78 PRO, Vikram Ambrose
* MCP79, 10de:0aad, SPI OK, Acer Aspire R3600, Andrew Morgan
* MCP79, 10de:0aae, LPC ??, Lenovo Ideapad S12 laptop, Christian Schmitt
* MCP79, 10de:0aae, SPI OK, Apple iMac9,1 Mac-F2218EA9, David "dledson"
flashrom will refuse to write/erase for safety reasons if MCP6x/MCP7x
SPI is detected.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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http://rayer.ic.cz/elektro/spipgm.htm
To use the RayeR driver, run
flashrom -p rayer_spi -V
Known bugs/limitations:
- Won't compile/work on non-x86 architectures.
- Will always use direct port I/O access.
Log follows:
flashrom v0.9.2-r1039 on MS-DOS 7 (i686), built with libpci 3.1.5, GCC
4.3.2, little endian
Calibrating delay loop... OK.
Initializing rayer_bitbang_spi programmer
Using port 0x378 as I/O base for parallel port access.
...
Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1
0xc2, id2 0x2015
...
Found chip "Macronix MX25L1605" (2048 KB, SPI) at physical address
0xffe00000.
...
No operations were specified.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Martin Rehak <rayer@seznam.cz>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add a requirements section to the man page which lists the needed access
permissions for each programmer.
This feature needs my pciutils/libpci 8/16-bit write emulation patch at
http://marc.info/?l=openbsd-ports&m=127780030728045 titled
[PATCH] Fix pciutils non-32bit PCI write on OpenBSD
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stuart Henderson <sthen@openbsd.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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warning-free compilation on older gcc versions (3.x and probably older).
Such a gcc version is the default on i386 OpenBSD.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stuart Henderson <sthen@openbsd.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1061 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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to compile with a meaningful error message.
Set the default for incompatible CONFIG_FOO to no.
Just running "make" should result in a a build which compiles the common
subset of available and working features.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer+lists.flashrom@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1048 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This ensures that any temp files in the configure/check step of the
Makefile are removed correctly.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer+flashrom@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1047 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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NEED_SERIAL and NEED_NET to decouple individual drivers from compilation
and linking decisions.
Move libgetopt from a DOS+PCI dependency to a DOS dependency to fix
linking on DOS if no driver requiring PCI is enabled.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1044 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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support.
Some instability remains, but that may be due to hardware problems in
the specific card (Netgear FA311) used for testing.
Signed-off-by: Andrew Morgan <ziltro@ziltro.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1039 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1034 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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other platform and lives in the pciutils package) and apparently the
libpciutils on NetBSD needs the NetBSD-native libpci (no equivalent on
other platforms).
Thanks to Jonathan A. Kollasch for reporting.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1033 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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chip window top/bottom alignment on non-x86 before it can be used.
Abort any internal programmer action for now until the code is fixed.
Add the concept of a processor enable for systems where flashing is
impacted by processor settings or processor model.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Only print "flashrom" as the program name unconditionally, not the full path
and program name (e.g. "/home/foo/bar/baz/flashrom" or on Windows
"C:\Foo\Bar\Whatever\flashrom.exe"). The path or exact executable name is
not really useful to print here, if you managed to run --help you already
know it, and it just makes the output look ugly.
Also, add a missing newline to make the output look nicer.
Finally, revert the "CONFIG_PRINT_WIKI ?= yes" change which accidentally
slipped into r1029.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1030 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Peter Lemenkov <lemenkov@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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capitalization):
CONFIG_FT2232SPI (makefile config option)
FT2232_SPI_SUPPORT (#define)
ft2232spi (programmer name)
ft2232_spi.c (programmer file)
Use CONFIG_* with underscores for makefile config options and #defines
and kill the useless _SUPPORT idiom.
Use lowercase names with underscores for programmer names and programmer
files.
With this, you can run "grep -i ft2232_spi" and find everything related
to the ft2232_spi driver. Same applies to all other programmers.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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clean. This allows users to run make clean without specifying the target
architecture.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1022 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- x86/x86_64 (little endian)
- PowerPC (big endian)
- MIPS (big+little endian)
No changes to programmer specific code. This means any drivers with MMIO
access will _not_ suddenly start working on big endian systems, but with
this patch everything is in place to fix them.
Compilation should work on all architectures listed above for all
drivers except nic3com and nicrealtek which require PCI Port IO which is
x86-only for now.
To compile without nic3com and nicrealtek, run
make distclean
make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no
Thanks to Misha Manulis for testing early versions of this patch on
PowerPC (big endian) with the satasii programmer.
Thanks to Segher Boessenkool for design review and for helping out with
compiler tricks and pointing out that we need eieio on PowerPC.
Thanks to Vladimir Serbinenko for compile testing on MIPS (little
endian) and PowerPC (big endian) and for runtime testing on MIPS (little
endian).
Thanks to David Daney for compile testing on MIPS (big endian).
Thanks to Uwe Hermann for compile and runtime testing on x86_64.
DO NOT RUN FLASHROM ON NON-X86 AFTER APPLYING THIS PATCH!
This patch only provides the infrastructure, but does not convert any
drivers, so flashrom will compile, but it won't do the right thing on
non-x86 platforms.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Misha Manulis <misha@manulis.com>
Acked-by: Vladimir 'phcoder/φ-coder' Serbinenko <phcoder@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Segher Boessenkool <segher@kernel.crashing.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Joerg Fischer <turboj@gmx.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1002 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Change the command line interface to make file names positional.
Add more sanity checks to the command line parser.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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accesses goes through DS,
the 1:1 mapping is fixed so the _DS base is taken onto account. Plus is that the hwaccess.c needs
no change and memcpy etc can be used on mmaped space.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@995 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch uses code from Idwer Vollering and Maciej Pijanka.
I've added Makefile support and compiler version printing and
restructured the code heavily.
The code prints runtime system information and buildtime libpci
information (I couldn't find any runtime libpci version function). Due
to our ability to cross-compile flashrom, buildtime system information
from "uname -mrs" doesn't help diagnosing any problems. That's why only
libpci and gcc are buildtime info, and the rest is runtime info.
Examples:
openSUSE 10.3, i686, gcc 4.2.1, with PCI support:
flashrom v0.9.1-r971 on Linux 2.6.22.19-0.2-default (i686), built with
libpci 2.2.6, GCC 4.2.1 (SUSE Linux)
openSUSE 10.3, i686, llvm-clang-2.6.99svn97231, with PCI support:
flashrom v0.9.1-r971 on Linux 2.6.22.19-0.2-default (i686), built with
libpci 2.2.6, LLVM 1/clang 1
openSUSE 11.1, x86_64, gcc 4.3.2, with PCI support:
flashrom v0.9.1-r972 on Linux 2.6.27.29-0.1-default (x86_64), built with
libpci 3.0.1, GCC 4.3.2 [gcc-4_3-branch revision 141291]
openSUSE 10.3, i686, gcc 4.2.1, without PCI support:
flashrom v0.9.1-r971 on Linux 2.6.22.19-0.2-default (i686), built with
GCC 4.2.1 (SUSE Linux)
Windows/cygwin, i686, gcc 4.3.4, without PCI support:
flashrom v0.9.1-r973 on CYGWIN_NT-5.1 1.7.1(0.218/5/3) (i686), built
with GCC 4.3.4 20090804 (release) 1
FreeBSD 8.0, i386, gcc 4.2.1, with PCI support:
flashrom v0.9.1-r973 on FreeBSD 8.0-RELEASE-p2 (i386), built with libpci
3.1.7, GCC 4.2.1 20070719 [FreeBSD]
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Maciej Pijanka <maciej.pijanka@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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FreeBSD 8.0-RELEASE i386
This is caused by a strict linker. Parsing linker error messages is an
exercise in futility, and library detection with
$CC --print-file-name
is totally useless for libraries outside the standard hardcoded builtin
gcc search path (probably the same for other compilers as well).
Look for libpciutils instead of libpci on NetBSD during the check.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@968 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add a README with build instructions.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Rudolf Marek <r.marek@assembler.cz>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@963 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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add unlock_82802ab
strip unlock code from erase_block_82802ab
rename erase_82802ab_block to erase_block_80280ab
delete sharplhf00l04.o from Makefile
delete *_lhf00l04* from chipdrivers.h
add unlock_stm50flw0x0x
delete wait_stm50flw0x0x
delete write_page_stm50flw0x0x
convert erase_stm50flw0x0x to erase_chip_stm50flw0x0x
delete write_stm50flw0x0x
add unlock_82802ab to two Intel chips with TEST_BAD_WRITE
change the status of 82802AB, 82802AC, M50FW040, M50FW080 to TEST_OK_PR
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@948 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Remove chipdriver.h include from flash.h
Some of the spi programmer drivers required chipdrivers.h, needs fixing later:
it87spi.c
ichspi.c
sb600spi.c
wbsio_spi.c
buspirate_spi.c
ft2232spi.c
bitbang_spi.c
dediprog.c
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@914 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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It's disabled by default. The current status is detailed at:
http://www.flashrom.org/pipermail/flashrom/2010-January/001828.html
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Fixes missing unlock for certain chips:
* unlock_49lf00x
* Pm49fl002
* Pm49fl004
* unlock_49flxxxc
* SST49LF160C
* unlock_winbond_fwhub
* W39V080FA
* W39V080FA (dual mode)
Fixes missing printlock for certain chip:
* printlock_w39v040c
* W39V040C
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@907 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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architecture library name.
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@903 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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only need hardware (ioport, memory) access.
Split internal.c into internal.c and hwaccess.c.
Note: This patch was created by "svn cp internal.c hwaccess.c" and then
removing stuff from both files. That's why you can't apply the patch
as-is before running the svn cp.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add FEATURE_SHORT_RESET, FEATURE_LONG_RESET, and FEATURE_EITHER_RESET
rewrite jedec functions to use getaddrmask
convert write_49f002 to write_jedec_1
convert write_w39v040c to write_jedec_1
convert probe_w39v040c to probe_jedec
convert write_49lf040 to write_jedec_1
convert write_pm29f002 to write_jedec
convert write_29f040b to write_jedec_1
convert probe_29f040b to probe_jedec
convert erase_chip_29f040b to erase_chip_block_jedec
convert erase_sector_29f040b to erase_sector_jedec
convert write_m29f002b to write_jedec
convert write_m29f002t to write_jedec
convert *_29f002 to *_jedec
decouple unused files from Makefile:
am29f040b.c
en29f002a.c
m29f002.c
mx29f002.c
pm29f002.c
sst49lf040.c
w39v040c.c
w49f002u.c
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Anders Juel Jensen <andersjjensen@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@886 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@880 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@878 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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If a board is not uniquely identifiable by PCI device/subsystem IDs, a
string can be specified to be looked for (case-sensitive, substring or
anchored) for now in one of the following DMI items in addition to matching
the PCI IDs:
- System Manufacturer
- System Product Name
- System Version
- Baseboard Manufacturer
- Baseboard Product Name
- Baseboard Version
Strings are anchored re-like (^ at the beginning, $ at the end), but
there are no plans to support full regular expressions and matched to any
of the mentioned fields.
The match is only made if DMI info is available and the string matches.
If no DMI info is available and the PCI IDs match, a warning is printed
as the board can not be autodetected.
It's still open to discussion whether we add an DMI override switch to
specify a string that will definitely match, and whether this switch is
only used if no DMI is available or whether it overrides or augments DMI
data.
DMI data is currently read using dmidecode. This tool is available for
all major platforms except MacOS X. I heard that there also is a MacOS X
version of dmidecode, but didn't investigate that.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Reverse engineered from USB logs. I never touched that programmer nor
did I ever see the associated software.
Disabled by default until it is complete. The driver needs to be hooked
up to the SPI core before it will do anything besides init and
diagnostics.
I successfully reverse engineered all commands, but some are still
somewhat magic.
Logs from "flashrom -p dediprog -V" are appreciated.
Probe and read should work, erase/write is expected to explode.
The programmer will set voltage to 0 on exit.
Thanks a lot to Stefan Reinauer and Patrick Georgi for providing USB
logs and for testing the result.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This is not just for fun. We hit a real bug on BSD with the outl macros.
The macro variable tmp collided with the tmp from outer scope.
second revision, now also taking care of inb/inw/inl. While that shadowing
did not introduce bugs (yet), of course it breaks the build on BSD when
-Wshadow is enabled.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Luc Verhaegen <libv@skynet.be>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@860 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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.features was always regenerated in that case, triggering whole-project
recompiles even if nothing changed.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@844 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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interface for flashrom. It also changes so -VV will spit out highly verbose
messages for debugging. This is a minimal patch to lessen impact a later patch
will convert current printf messages to the new interface.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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and rename them accordingly. For now, main() just calls cli_classic(),
but alternative frontends can be switched in main().
Annotate remaining help texts with CLI dependency inside flashrom.c with
a FIXME comment.
Now people can go and create different frontends and be happy. Please
note that any other frontend will have to sort of duplicate the probing
code in cli_classic.c. Refactoring that part of the code is possible,
but not easy because we still want to print instructive help messages
for users.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@833 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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those functions lived inside internal.c and were unavailable if no
PCI-based programmers were compiled in. Move those functions to the new
file programmer.c.
Thanks to Patrick Georgi for finding this.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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$(OBJS) in Makefile into separate lists for Programmer, Chip, and CLI
related files/objects. This should help later on figuring out where
files may go for a libflashrom library.
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@824 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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libpci is no longer required to build flashrom and will not be checked
for if no PCI code is needed for the selected programmers.
libftdi is no longer checked for if FT2232 support is not selected.
With this patch, it is possible to build on pretty much every OS out
there (including Windows) without altering the Makefile.
Some gcc versions may need a CFLAGS override for a warning in
dummyflasher.c, though.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@823 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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internal_delay(). Move that function to udelay.c and compile internal.c
only if really needed.
physmap.c is only needed if the programmer is internal or a PCI card.
Make its compilation conditional.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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