| Commit message (Collapse) | Author | Age | Files | Lines |
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register_programmer suggests that we register a programmer. However,
that function registers a master for a given bus type, and a programmer
may support multiple masters (e.g. SPI, FWH). Rename a few other
functions to be more consistent.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1831 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Move some suitable functions there, add it to the Makefile, but leave the
declarations in flash.h for now.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1819 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This fixes segfaults on reads (implicit reads on writes too), ouch.
Thanks to The Raven for reporting the problem and testing my patch, and
to Alexander Irenkov for providing a workable fix for it additionally.
There were actually two problems:
1) The loop conditions were bogus which could lead to read errors
(e.g. on implicit erase verifications).
2) The offset used within the read buffers provided to spi_nbyte_read()
and memcpy() were not starting at 0 but the offset of the block
within the flash chip (which has nothing to do with read buffer in
most cases).
This patch works similarly to Alexander's but is intended to be
more readable.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1792 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Inspired by and mostly based on a patch
Signed-off-by: Mark Marshall <mark.marshall@omicron.at>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1789 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This one is even more strange than the AT45DB chips. Like the AT45DB321C
it does not support any power-of-2 page sizes. There is only one asymmetrical
eraser and that uses two opcodes.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1725 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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It seems like this model is one-of-a-kind... it shares some properties
with the older versions of the AT45DB series as well as with new ones.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1724 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Aidan Thornton <makosoft@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1723 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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