summaryrefslogtreecommitdiff
path: root/chipset_enable.c
Commit message (Collapse)AuthorAgeFilesLines
* Original v2 revision: 2997uwe2007-12-041-82/+59
| | | | | | | | | | | | | | Various coding style fixes, constification, fixed typos (trivial). Also, s/0xFF80/0xFFC0/ in the Acorp 6A815EPD board-enable, as per http://www.linuxbios.org/pipermail/linuxbios/2007-December/027750.html Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@162 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2967jcrouse2007-11-131-0/+55
| | | | | | | | | | | | | | [LinuxBIOS] flashrom support for AMD Geode CS5536 Attached is a patch that enables AMD Geode CS5536 chipset support. I have tested it successfully on a MSM800 board from digital logic. Signed-off-by: Lane Brooks <lbrooks@mit.edu> Acked-by: Jordan Crouse <jordan.crouse@amd.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@160 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2903uwe2007-10-301-0/+1
| | | | | | | | | | | | | | Add support for Intel 440MX systems. Add support for the Fujitsu MBM29F400TC flash part. Detection and reading works, writing is not tested. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@158 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2873uwe2007-10-171-2/+2
| | | | | | | | | | | Some cosmetic cleanups in the flashrom code and output. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2868hailfinger2007-10-171-2/+2
| | | | | | | | | | | | | Fix wrong values/typos in chipset_enable.c. This has been confirmed by Ed Swierk in http://www.mail-archive.com/linuxbios@linuxbios.org/msg09788.html . Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@150 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2847uwe2007-10-101-1/+1
| | | | | | | | | | | Revert my last cleanup patch. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@143 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2846uwe2007-10-101-1/+1
| | | | | | | | | | | Cosmetic changes to make the flashrom output more consistent (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@142 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2770uwe2007-09-111-6/+4
| | | | | | | | | | | | Change out/in combinations to pci_read/write_byte in sis630 chipset enable. Signed-off-by: Alex Beregszaszi <alex@rtfs.hu> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@138 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2751uwe2007-08-291-7/+19
| | | | | | | | | | | | Change all flashrom license headers to use our standard format. No changes in content of the files. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2748uwe2007-08-231-9/+8
| | | | | | | | | | | Cosmetic fixes (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2746uwe2007-08-231-2/+0
| | | | | | | | | | | Drop a bunch of useless header files, merge them into flash.h. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2715uwe2007-06-061-10/+21
| | | | | | | | | | | | | | | | | Fix up and document the AMD CS5530/CS5530A support in flashrom. The previous code was pretty unreadable, undocumented and did some totally unrelated things (such as mucking with the game port or port 0x92). This version is tested with a 256 KB chip and should work for the CS5530 and CS5530A. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@120 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2713uwe2007-06-051-4/+3
| | | | | | | | | | | | flashrom: Document the newly supported IBM x3455 board and the now-supported Broadcom HT-1000 chipset (trivial). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2712stepan2007-06-051-5/+0
| | | | | | | | | | | Move GPIO settings to board specific code for IBM x3455 Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@118 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2711stepan2007-06-051-0/+24
| | | | | | | | | | | Add support for BCM HT1000 chipset to flashrom. Tested on IBM x3455. (trivial) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2677uwe2007-05-201-0/+14
| | | | | | | | | | | | | | | | | | Flashrom: add support for ASUS P5A (Socket 7, ALi based). * Add support for the ALi M1533 to chipset_enable.c * Add some SMBus poking needed for the ASUS P5A, to board_enable.c Since PCI subsystem IDs are worthless with this board, people will have to name the board directly. Signed-off-by: Luc Verhaegen <libv@skynet.be> Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@109 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2643uwe2007-05-091-141/+134
| | | | | | | | | | | | | | | | Fix coding style of flashrom by running indent on all files: indent -npro -kr -i8 -ts8 -sob -l80 -ss -ncs *.[ch] Some minor fixups were required, and maybe a few more cosmetic changeѕ are needed. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2599stepan2007-04-091-0/+1
| | | | | | | | | | | add support for CX700 builtin southbridge Signed-off-by: Randall Philipson <rtphilipson@cox.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@101 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Original v2 revision: 2581stepan2007-04-041-0/+469
flashrom: split flash_enable.c into chipset_enable.c and board_enable.c This splits up the ROM Write enable code into chipset specific and board specific parts. This of course means that a lot of code is plainly moved about. * Allows for linuxbios name matching and pci-subsystem id matching. The latter uses a double set to properly distuinguish boards despite of some known vendors being lax about it. * Fixes GPIO15 being raised on every VT8235 southbridge, regardless of what that line actually controls; rom on EPIA-M, backlight on mitac 8999 laptop. * Adds flashrom support for Asus A7V400-MX (KM400 + VT8235) * Island aruma was renamed agami aruma, the board specific code now got adjusted. A set of pci-ids was retrieved from source code. Signed-off-by: Luc Verhaegen <libv@skynet.be> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@99 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
View Lorry Controller Status