| Commit message (Collapse) | Author | Age | Files | Lines |
|
|
|
|
|
|
|
|
|
|
|
|
| |
Cast input to tolower() to unsigned char to work around how tolower() is
implemented on NetBSD.
Also, use CPPFLAGS (rather than overriding CFLAGS) for the
NetBSD/DragonFly build example.
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@905 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Rule of thumb: Diagnostic programmer init messages are msg_pdbg, all
other debug stuff (except warnings, which should be pmsg_pinfo or
msg_perr) is msg_pspew.
This makes "flashrom -p dummy -V" output a whole lot more readable
(try it!). In case someone wants the full barfed output, it is
possible to specify -VV instead of -V.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@842 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
| |
reduce #ifdef clauses a lot if we compile out some programmers
completely.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@679 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
| |
Serprog compilation is now controlled by a Makefile variable.
Replace munmap with physunmap where appropriate.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@671 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Some SPI opcodes need to be sent in direct succession after each other
without any chip deselect happening in between. A prominent example is
WREN (Write Enable) directly before PP (Page Program). Intel calls the
first opcode in such a row "preopcode".
Right now, we ignore the direct succession requirement completely and it
works pretty well because most onboard SPI masters have a timing or
heuristics which make the problem disappear.
The FT2232 SPI flasher is different. Since it is an external flasher,
timing is very different to what we can expect from onboard flashers and
this leads to failure at slow speeds.
This patch allows any function to submit multiple SPI commands in a
stream to any flasher. Support in the individual flashers isn't
implemented yet, so there is one generic function which passes the each
command in the stream one-by-one to the command functions of the
selected SPI flash driver.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Jakob Bornecrantz <wallbraker@gmail.com>
Tested-by: Jakob Bornecrantz <wallbraker@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@645 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
once.
Add chip_{read,write}n to the external flasher infrastructure which
read/write n bytes at once.
Fix a few places where the code used memcpy/memcmp although that is
strictly impossible with external flashers.
Place a FIXME in the layout.c code because usage is not totally clear
and needs to be fixed to support external flashers.
As a nice side benefit, we get a noticeable speedup for builtin flash
reading which is now a memcpy() of the full flash area instead of a
series of single-byte reads.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
| |
given.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@577 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
| |
this in the last commit. Also do some random cleanups while I'm at it.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
The syntax is explained in the man page.
Example: flashrom -p dummy=lpc,fwh
Tested, works perfectly. ;-)
As a nice benefit, it allows easy testing of the "probe only compatible
flashes" patch.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@559 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
only differentiates between SPI and non-SPI. Anyone who knows more about
a specific flash chip should feel free to update it.
The existing flashbus variable was abused to denote the SPI controller
type. Use an aptly named variable for that purpose.
Once this patch is merged, the chipset/programmer init functions can set
supported flash chip types and flashrom can automatically select only
matching probe/read/erase/write functions.
A side benefit of that will be the elimination of the Winbond W29EE011
vs. AMIC A49LF040A conflict.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@556 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
| |
Build-tested on 32bit x86.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@521 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
chips in external flashers, they are not accessed via pointers at all.
Benefits:
This allows us to differentiate between volatile machine memory accesses
and flash chip accesses.
It also enforces usage of chip_{read,write}[bwl] to access flash chips,
so nobody will unintentionally use pointers to access chips anymore.
Some unneeded casts are removed as well.
Grepping for chip operations and machine memory operations doesn't yield
any false positives anymore.
Compile tested on 32 bit and 64 bit Linux.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@519 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
flasher driver.
Does not support reading or writing the fake chip yet.
flashrom --programmer dummy
also enables the dummy SPI controller driver.
Testing the dummy SPI driver revealed a RDID debug printing bug in the
SPI core. Fix that as well.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@507 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
Print the return value of dummy_chip_read[bwl].
Align entries in programmer_table.
This is a cosmetic patch and has no effect on code flow.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@495 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| |
even the dummy flasher caused memory mappings to be set up.
Add map/unmap functions to the external flasher abstraction.
Fix a possible scribble-over-low-memory corner case which fortunately
never triggered so far.
With this patch, --programmer dummy works fine as non-root.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@493 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|
|
Usage:
flashrom --programmer dummy
This is a great way to test flashrom without root access.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@483 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
|