| Commit message (Collapse) | Author | Age | Files | Lines |
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These are very similar to Eon's EN25B series but unlike those the
EN25P has uniform sectors (of 32 and 64 kB). They can not be
distinguished by RDID alone but the RES and REMS IDs are different
and hence could be detected eventually in the future. This patch
also refines tiny bits of the EN25B series.
The series includes:
- EN25P05
- EN25P10
- EN25P20
- EN25P40
- EN25P80
- EN25P16
- EN25P32
- EN25P64
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This is based on the code sent to the flashrom mailing list
by Alex Lu (alexlu6@mxic.com.tw) without sign-off.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1867 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This flash chip can be configured (one time) to use 64 KiB or 256 KiB sectors.
Additionally, in the 64 KiB mode it supports 16 4 KiB sub-sectors that can be
(one time) programmed to be on the top or bottom of the device. The sub-sectors
can be erased with the 0x20 opcode but because this opcode does not work
with the remaining sectors and flashrom can not cope with that the 0x20
opcode is not supported yet.
This patch adds two definitions, one for the 64 KiB and 256 KiB configuration
respectively. The device also shares the RDID with the various S25FL128
devices so we have to increase the maximum number of successfully probed
chips to 8.
The 64 KiB mode was tested on real hardware.
Signed-off-by: Jernej Škrabec <jernej.skrabec@planet.si>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1858 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Both use the same ID and are mostly identical.
Tested-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1857 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Michael Coppola <michael.n.coppola@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1846 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested mainboards:
OK:
- ASUS F2A85-M
Reported by various corebooters
- ASUS M2N-MX SE Plus
Reported by Antonio
- ASUS P5LD2
Reported by François Revol
- Lenovo ThinkPad T530
Reported and partially authored by Edward O'Callaghan
- MSI MS-7502 (Medion MD8833)
Reported by naq on IRC
- Shuttle AB61
Reported by olofolleola4
- ZOTAC IONITX-F-E
Reported by Bernardo Kuri
Flash chips:
- Atmel AT45DB021D to PREW (+PREW)
Reported by The Raven
- Atmel AT25F4096 to PREW (+PREW)
Reported by 공준혁
- GigaDevice GD25Q16(B) to PREW (+PREW)
Reported by luxflow@live.com using a GD25Q16BSIG
- Catalyst CAT28F512
Mark erase and write as known bad (not implemented)
Miscellaneous:
- Various spelling corrections by Daniele Forsi.
- Added and refined a bunch of chips originally investigated by Carl-Daniel.
- Marked the ARM-USB-OCD-H programmer as tested
(reported by Ruud Schramp).
- Tiny other stuff.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1839 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Additionally to the existing S25FL128S......0 definition this patch
adds S25FL128P......0, S25FL128P......1 and S25FL128S......1, as well as
S25FL129P......0 and S25FL129P......1 definitions.
S25FL12xP seem to be the predecessor families of S25FL128S. All
associated chips can not be distinguished with RDID alone.
Besides the new chips, this patch also fixes the name of the previously
supported S25FL128S model with uniform 256 kB sectors
(S25FL128P......1 not 0) and adds the hybrid sector version (0) as well.
Due to the shared IDs the user has to select the right chip manually
with the -c parameter. To make this even possible, this patch enlarges
the respective array for results to 6.
Tested-by: Antonio Ospite <ao2@ao2.it>
with a S25FL129P......0.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1838 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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29GL chips use a new 3-Byte device ID probing function at addresses
0x01, 0x0E, 0x0F.
Flash chip families supported by this method include...
- EON EN29GL
- Gigadevice GD29GL (if they really exist)
- ISSI (PMC) IS29GL
- Macronix MX29GL (+MX68GL1G0F)
- Spansion S29GL (+S70GL02G)
- Winbond W29GL
This patch adds respective flash chip definitions for chips up to 16 MB from
Eon, ISSI, Macronix and Winbond. Bigger chips as well as those from
Gigadevice and Spansion are left out.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1835 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Also, slightly refine the definition of AT49LH002.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1834 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The MX29F022(N)T definition was successfully tested by Daniele.
Signed-off-by: Daniele Forsi <dforsi@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1825 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Also, add spi_disable_blockprotect_bp1_srwd().
Originally written and tested by The Raven <originalraven@hotmail.com>.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1818 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1810 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Apparently PMC did not understand the purpose of the JEDEC
continuation code. These chips reply to RES (the only supported ID
command) with the prefix-less vendor ID, a device ID, eventually
followed by the continuation byte for the vendor ID.
This fix uses only the first two bytes instead of appending the
continuation code to the device ID. The problem was reported by The
Raven who also tested the fix on a Pm25LV010 (with an imprint of
"Pm25LV010E").
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1806 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1801 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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No datasheet available. Tested read, write and all erasers separately by
The Raven. He did also provide the patch but refused to sign it off.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1796 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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It is very similar to LE25FW418A, except for HD_READ support (that
is not implemented in flashrom anyway yet) and allowed voltage range.
Probing, erasing, reading and writing has been tested.
This chip is found on Seagate Constellation hard drives.
Signed-off-by: Jurij Munda <jurij.munda@uni-mb.si>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1791 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested on hardware by Idwer too.
Signed-off-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1787 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested with actual S25FL164K via Arduino SPI.
Signed-off-by: Nikolay Martynov <mar.kolya@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1786 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Also, refine status register prettyprinting and unlocking of the whole family.
Signed-off-by: Jason Harper <jharper@iseis.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1785 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Michael Coppola <michael.n.coppola@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1784 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested mainboards:
OK:
- abit BX6 2.0
Reported by Stefan Tauner
- Acer EM61SM/EM61PM (used in Acer Aspire T180)
Reported by Benjamin Bellec
- ADLINK Express-HR
Reported by Obermair Thomas
- ASUS M3N-H/HDMI
Reported by Franc Serres
- Attro G5G100-P
Reported by Christoph Grenz
- ASRock 960GM-GS3 FX
Reported by Fuley Istvan
- Elitegroup P6BAP-A+ (V2.2)
Reported by Arnaldo Pirrone
- Elitegroup GeForce7050M-M (V2.0)
Reported by Leif Middelschulte
- Fujitsu D3041-A1 (used in ESPRIMO P2560)
Reported by Daggi Duck
- GIGABYTE GA-8S648
Reported by TeslaBIOS
- GIGABYTE GA-970A-D3P (rev. 1.0)
Reported by Jean-Francois Pirus
- GIGABYTE GA-B85M-D3H
Reported by Mladen Milinković
- GIGABYTE GA-X79-UD3
Reported by Jeff O'Neil
- GIGABYTE GA-X79-UP4 (rev. 1.0)
Reported by George Spelvin
- GIGABYTE GA-Z68MA-D2H-B3 (rev. 1.3)
Reported by Vangelis Skarmoutsos
- GIGABYTE GA-Z87-HD3
Reported by virii5
- Lenovo Tilapia CRB
Reported by jenkins56 on IRC
- MSI GT60-2OD (notebook, only with layout patches)
Reported by Vasiliy Vylegzhanin
- MSI MS-6704 (845PE Max2 PCB 1.0) (Pure Version w/o raid)
Reported by professorll
- MSI MS-7399 1.1 (used in Acer Aspire M5640/M3640)
Reported by Koen Rousseau
- MSI MS-7125 (K8N Neo4(-F/FI/FX))
We had a board enable for that one for years, but it was not (and still is not)
completely clear which boards are covered.
- MSI MS-7522 (MSI X58 Pro-E)
Reported by Gianluigi Tiesi
- PCWARE APM80-D3
Reported by César Augusto Jakoby
- Pegatron IPP7A-CP
Reported by Илья Шипко
- Supermicro H8QME-2
Reported by Greg Tippitt
- Supermicro X7SPA-H
Reported by Kyle Bentley
- Supermicro X7SPE-HF-D525
Reported by Micah Anderson
- Supermicro X8DTE
Reported by Mark Nipper
- Supermicro X8SIL-F
Reported by Peter Samuelson
- ZOTAC IONITX-A (-E) version
Reported by Maciej Wroniecki
NOT OK:
- Supermicro X10SLM-F
Reported by Micah Anderson
Flash chips:
- Atmel AT29C020 to PREW (+PREW)
It was marked like that in the past, but I could not find the reason why the
test bits were reset. Urja Rannikko tested it again and it still works.
- Eon EN25F10 to PREW (+PREW)
Reported by Stolmár Tamás
- Eon EN25QH64 to PR (+PR)
Reported by Vladimir 'φ-coder' Serbinenko
- GigaDevice GD25Q32(B) to PREW (+PREW)
Reported by mrnuke
- Macronix MX25L512(E)/MX25V512(C) to PREW (+PREW)
Reported by Jamie Nichol
- Macronix MX25L2005(C) to PREW (+PREW)
Reported by Давыдов Дмитрий
- Micron/Numonyx/ST N25Q064..1E to PREW (+PREW)
Reported by Paolo Zambotti
- Pmc Pm25LD010(C) to PREW (+PREW)
Reported by Vasile Ceteras
- Micron/Numonyx/ST M25P16 to PREW (+EW)
Reported by raven
- Micron/Numonyx/ST M25PX64 to PREW (+W)
Reported by Zaolin
- SST SST25VF020B to PREW (+PREW)
Reported by Michaël Zweers
- SST SST49LF040 to PREW (+W)
Reported by Oskar Enoksson
- Add support for MX25L3273E (evil twin of MX25L3205 et al.)
Also, add MX25L1673 and MX25L6473E to the names of their twins and
add a note about MX25L8073E.
- Winbond W25X32 to PREW (+REW)
Reported by The Raven
- Winbond W29C010 etc. to PREW (+W)
Reported by san
Chipsets tested OK:
- Intel NM70 (8086:1e5f)
Reported by mrnuke
- Intel C204 (8086:1c54)
Reported by Vasiliy Vylegzhanin
- Intel QM67 (8086:1c4f)
Reported by Obermair Thomas
- Intel HM77 (8086:1e57)
Reported by Vasiliy Vylegzhanin
- Intel B85 (8086:8c50)
Reported by Mladen Milinković
- Intel HM87 (8086:8c4b)
Reported by Vasiliy Vylegzhanin
- Intel Z87 (8086:8c44)
Reported by virii5
- NVIDIA MCP51 (10de:0261)
Reported by Marcin Kościelnicki
- SiS 648 (1039:0648)
Reported by TeslaBIOS
Miscellaneous:
- Mark ARM-USB-TINY-H as tested in ft2232_spi (reported by _nanodev_).
- getrevision.sh: Ignore failing date calls.
- getrevision.sh: Fix -u and -l for older git versions which require = for the
git log grep parameter.
- Corrected K8T Neo2-F entries due to a report from Stelios Tsampas.
- Add "-p internal" to output that requests users to send flashrom -V logs.
- Add Macbook2,1, Thinkpad X230, EasyNote LM85 to laptop whitelist.
- Tiny other stuff.
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1783 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Reorder some models and refine comments.
- Add SST25VF512A:
AAI is available but with an uncommon opcode (0xAF). Fully tested
with Bus Pirate 3.5 running 6.2 beta firmware by Cory.
- Add SST25VF020 and SST25VF020B.
Signed-off-by: Cory Henderson <dcoryh192@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1758 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Aidan Thornton <makosoft@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1723 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1722 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested mainboards:
OK:
- ASUS C60M1-I
http://www.flashrom.org/pipermail/flashrom/2013-February/010578.html
- ASUS P8H77-I
http://www.flashrom.org/pipermail/flashrom/2013-March/010607.html
- ASUS P8H77-M
http://www.flashrom.org/pipermail/flashrom/2013-May/010994.html
- ASUS P8P67 LE (B2)
http://www.flashrom.org/pipermail/flashrom/2013-May/010972.html
- Elitegroup GeForce6100PM-M2 (V3.0)
http://www.flashrom.org/pipermail/flashrom/2013-July/011177.html
- GIGABYTE GA-P55A-UD7
http://www.flashrom.org/pipermail/flashrom/2013-July/011302.html
- MSI B75MA-E33 (MS-7808)
http://www.flashrom.org/pipermail/flashrom/2013-March/010659.html
- MSI H77MA-G43 (MS-7756)
http://www.flashrom.org/pipermail/flashrom/2013-April/010853.html
- MSI KA780G (MS-7551)
http://paste.flashrom.org/view.php?id=1617
- SAPPHIRE IPC-E350M1
Reported by xvilka on IRC
- Supermicro X8DTG-D
http://www.flashrom.org/pipermail/flashrom/2013-July/011305.html
NOT OK:
- ASRock Fatal1ty Z77 Performance
http://www.flashrom.org/pipermail/flashrom/2013-January/010467.html
- ASRock Z68 Extreme4
http://www.flashrom.org/pipermail/flashrom/2013-May/010984.html
- ASUS P8B75-M LE
http://www.flashrom.org/pipermail/flashrom/2013-April/010867.html
- ASUS P8P67-M PRO
http://www.flashrom.org/pipermail/flashrom/2013-February/010541.html
- ASUS P8Z68-V LE
http://www.flashrom.org/pipermail/flashrom/2013-February/010582.html
- Intel DQ77MK
http://paste.flashrom.org/view.php?id=1603
- Supermicro X9DRD-7LN4F
http://paste.flashrom.org/view.php?id=1582
- Supermicro X9SCE-F
http://www.flashrom.org/pipermail/flashrom/2013-February/010588.html
- Supermicro X9SCM-F
http://www.flashrom.org/pipermail/flashrom/2013-February/010527.html
- Tyan S7066
http://www.flashrom.org/pipermail/flashrom/2013-March/010630.html
Chipsets:
- Marked Intel B75 as tested
http://www.flashrom.org/pipermail/flashrom/2013-March/010659.html
- Marked Intel H77 as tested
http://www.flashrom.org/pipermail/flashrom/2013-March/010607.html
- Removed 10de:03e2 because it is apparently the MCP61 host bridge.
It was reclassified to Host Bridge in the PCI device ID database and there
is at least one report suggesting this configuration too:
http://www.flashrom.org/pipermail/flashrom/2012-August/009716.html
- Added MCP89 which hopefully works with the code for previous versions.
Thanks to James Laird for submitting this change.
Tested flash chips:
- Atmel AT25DF641(A) to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2013-June/011113.html
- Atmel AT25F512 to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2013-April/010904.html
Also, change its ID according to Modification of PCN SC040401A:
"There has been a change in the returned value of the Product Identification
(RDID) command, the AT25F512A RDID code is 65h compared to 60h from
the AT25F512 product."
It seems to be quite likely that all AT25F512 are fully functional relabeled
AT25F1024 chips. There are even some hints in the datasheet:
in table 6 they stress that address pin 16 needs to be low under all circum-
stances; while continuous reads can wrap around on the AT25F1024 the DS
notes "For the AT25F512, the read command must be terminated when the
highest address (00FFFF) is reached." OTOH the lock bit semantics are
different, but this has not been tested thoroughly
- Atmel AT25F512A to PREW (+PREW)
http://paste.flashrom.org/view.php?id=1569
- Eon EN25F05 to PREW (+PREW)
http://paste.flashrom.org/view.php?id=1571
- Macronix MX25L12805(D) to PREW (+REW)
http://www.flashrom.org/pipermail/flashrom/2013-April/010913.html
- Spansion S25FL256S......0 and S25FL512S to P/!R!E!W (+P)
Tested by Stefan Tauner
- Micron/Numonyx/ST M25PX80 to PREW (+PREW)
Tested by Stefan Tauner
- Micron/Numonyx/ST N25Q032..3E and N25Q128..3E to PREW (+PREW)
Tested by Stefan Tauner
- Micron/Numonyx/ST N25Q256..3E and N25Q512..3G to P/!R!E!W (+P)
Tested by Stefan Tauner
- SST SST25VF040B to PREW (+PREW)
http://paste.flashrom.org/view.php?id=1574
- SST SST25VF040B.REMS to PREW (+EW)
http://paste.flashrom.org/view.php?id=1575
- ST M25P05-A to PREW (+PREW)
http://paste.flashrom.org/view.php?id=1576
- ST M29W512B to PREW (+W)
http://www.flashrom.org/pipermail/flashrom/2013-March/010635.html
- Winbond W25Q64.W to PREW (+PREW)
Tested by the chromiumos guys.
- Winbond W25Q128.V to PREW (+REW)
http://www.flashrom.org/pipermail/flashrom/2013-June/011108.html
- Winbond W25X20 to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2013-May/010990.html
Miscellaneous:
- Add Lenovo X201 to the laptop whitelist.
- Add chip IDs for the ESMT F25L..QA family.
- Add chip IDs for a few Macronix MX25 models.
- The list of flashchips is not sorted strictly alphabetically and should not be
either. Refine the comment explaining the scheme on top of the list.
- Support -L output of chip sizes with up to 6 decimal places (up to 4 Gb).
- Use z length modifier in (more) prints for size_t types.
- Remove chips >16MB again because our current implementation of memory mapping
the flash chip violates common rules by mapping a window as large as the chip.
This leads to failing mmaps as can be seen here:
http://paste.flashrom.org/view.php?id=1695
- Document spispeed parameter of linux_spi (and fix some leaks).
- Rephrase the "multiple chips detected" message because it was confusing.
- Skip verification step if the image is equal to the flash contents.
- Tiny other stuff.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Most parts are also
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1702 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add...
- N25Q128..3E
- N25Q128..1E
- N25Q256..1E (defunct due to addressing)
- N25Q256..3E (defunct due to addressing)
- N25Q512..1E (defunct due to addressing)
- N25Q512..3E (defunct due to addressing)
- N25Q00A..3G (defunct due to addressing)
Also, refine existing family members.
Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com>
Reviewed-by: Steven Zakulec <spzakulec@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add...
- S25FL128S
- S25FL256S uniform version (defunct due to addressing)
- S25FL512S uniform version (defunct due to addressing)
Merge Intel S33 status register functions with this one's.
Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1692 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add...
- S25FL204K
- S25FL208K
- S25FL216K (same ID as S25FL116K)
Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com>
Reviewed-by: Steven Zakulec <spzakulec@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1691 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Also, refine status register prettyprinting and unlocking of all family
members and add OTP details.
Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com>
Reviewed-by: Steven Zakulec <spzakulec@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1690 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Also, refine unlocking of A25L032, A25LQ32A and A25LQ032.
Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com>
Reviewed-by: Steven Zakulec <spzakulec@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1689 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add...
- EN25QH64
- EN25QH128
- EN25QH256 (defunct due to addressing)
Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com>
Reviewed-by: Steven Zakulec <spzakulec@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1688 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add...
- EN25S10
- EN25S20
- EN25S40
- EN25S80
- EN25S16
- EN25S32
- EN25S64
Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com>
Reviewed-by: Steven Zakulec <spzakulec@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1687 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add...
- M45PE10
- M45PE20
- M45PE40
- M45PE80
- M45PE16
Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com>
Reviewed-by: Steven Zakulec <spzakulec@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1686 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add...
- GigaDevice GD25T80
- GigaDevice GD25Q10
- GigaDevice GD25Q512
Also, improve some others.
Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com>
Reviewed-by: Steven Zakulec <spzakulec@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1685 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add...
- Sanyo LE25FW403A
- Sanyo LE25FW418A
- Sanyo LE25FW806
- Sanyo LE25FW808
Also, fix wrong description of Sanyo LE25FW203A.
Signed-off-by: Nikolay Nikolaev <evrinoma@gmail.com>
Reviewed-by: Steven Zakulec <spzakulec@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1684 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add...
- N25S10
- N25S20
- N25S40
- N25S80
- N25S16
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1683 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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I broke unlocking them correctly in r1635 while refactoring (NB: the
commit log including the overly selfconfident statement about the
"bug in spi_disable_blockprotect_at25df()").
Affected chips have per sector protection bits and the write protection bits
in the status register do indicate if none, some or all sectors are protected.
It is possible to globally (un)lock all sectors at once but in a way that was
not anticipated when refactoring the spi25 unlocking functions into
spi_disable_blockprotect_generic(). To globally unprotect not only the
protection bits (2 and 3) have 0 to be written to them but also bits 4 and 5
which normally would not be touched by spi_disable_blockprotect_generic().
Some of the chips also support a permanent lockdown with fuses which we
do not handle yet.
To fix this without copying the whole method I introduce another mask
parameter to spi_disable_blockprotect_generic() namely unprotect_mask.
See verbose comments inline for details.
Also, prettyprint the status register after trying to disable the block
protection fails.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Tested-by: Chi Zhang <zhangchi866@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1679 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Use ".V" (and "_V" in macros) for 3.3V Winbond 25Q chips.
Rename the existing chips and add a .voltage entry where it was missing.
- Use ".W" (and "_W" in macros) for 1.8V Winbond 25Q chips.
- Add W25Q20.W, W25Q40.W, W25Q80.W, W25Q16.W, W25Q32.W, W25Q64.W.
Based on chromiumos' 469707f0d9b7d81b6c6bb2cace13f09db70f4382
http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commitdiff;h=469707f0d9b7d81b6c6bb2cace13f09db70f4382
Signed-off-by: Yung-Chieh Lo <yjlou%chromium.org@gtempaccount.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1677 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch adds support for
- Pm25LD256C
- Pm25LD512(C)
- Pm25LD010(C)
- Pm25LD020(C)
- Pm25LD040(C)
These seem to be the successors of the Pm25LV series.
The main difference seems to be the dual I/O and additional erase opcodes.
Some support an additional, complex locking register (maybe all of the
above, but available datahsheets do not indicate it for all).
The Pm25LD512C was tested by Chi Zhang:
http://paste.flashrom.org/view.php?id=1579
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1671 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Add missing bits and resort chips
- Refine Pm25LV512(A) and Pm25LV010
Due to manufacturer ID continuation this one needs a new probing
function: probe_spi_res3() which should be refactored in the future.
The datasheet describes a very weird order of ID bytes:
Vendor byte, model byte, vendor continuation byte. Let's pretend we did
not read that or the datasheet is bogus (although the datasheet of the
successor series describes the same but luckily additionally to RDID).
- Add Pm25LV010A
This was tested by Chi Zhang:
http://paste.flashrom.org/view.php?id=1573
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1670 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Similarly to the patch in r1647 this one updates the chips identified as above
with references to and data about their respective twins. Unlike previously this
one deals with the more evil details.
Helge Wagner from GE discovered some problems with chips sharing IDs
and proposed a patch to tackle (some of) them, see:
http://patchwork.coreboot.org/patch/3709/
That patch was bitrotting in our mailboxes for a long time and it is still not
ready for merge, but we increasingly get reports about problems (e.g.
http://paste.flashrom.org/view.php?id=1525) regarding these chips and
hence must act to ensure users' safety.
This patch splits the chip definitions of evil twins into separate ones which
correctly declare the respective attributes (the main problems are the erase
block sizes for the 0x20 opcode and hence my changes combine different
chips with partly different attributes apart from their names as long as the
erasers layout it the same). This forces the user to select the (right) chip
definition with the -c/--chip parameter and hence will break a number of
previously perfectly working environments.
0x2015 is used by and split to
- MX25L1605 (64kB sectors in 0x20 erases)
- MX25L1605A/MX25L1606E (4kB in 0x20 erases and an additional 0x52 opcode with 64kB blocks)
- MX25L1605D/MX25L1608D (4k sectors in 0x20 erases)
0x2016 is used by and split to
- MX25L3205/MX25L3205A (64kB 0x20)
- MX25L3205D/MX25L3208D (4kB 0x20)
- MX25L3206E (4k 0x20, 64k 0x52)
0x2017 is used by and split to
- MX25L6405/MX25L6405D (64k 0x20)
- MX25L6406E/MX25L6436E (4k 0x20)
- MX25L6445E (4k 0x20, 64k 0x52)
Bonus: add some minor details to MX25L1635D, MX25L1635E, MX25L3235D,
MX25L12805D.
Tested with MX25L3206E, MX25L64036E.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1657 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This older (ST-branded) revision of M25P20 chip does not support RDID and
hence was not detected correctly. This patch adds a workaround similar
to M25P40-old.
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1652 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested Mainboards:
OK:
- Acer V75-M (used in IBM Aptiva 2170-G)
http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html
- Acorp 6M810C
http://www.flashrom.org/pipermail/flashrom/2013-January/010433.html
- ASRock G31M-S rev 2.0
http://www.flashrom.org/pipermail/flashrom/2013-February/010538.html
- ASUS F1A75-V PRO
http://paste.flashrom.org/view.php?id=1528
- ASUS M5A97 (rev. 1.0)
http://www.flashrom.org/pipermail/flashrom/2013-February/010483.html
- ASUS P5KPL-AM IN/GB
http://www.flashrom.org/pipermail/flashrom/2013-January/010455.html
- GABYTE GA-H77M-D3H
http://www.flashrom.org/pipermail/flashrom/2013-February/010538.html
NOT OK:
- GIGABYTE GA-Z77MX-D3H
http://paste.flashrom.org/view.php?id=1529
http://paste.flashrom.org/view.php?id=1530
Tested flash chips:
- Winbond W25X10 to PREW (+PREW)
Reported on IRC(?)
- Eon EN25Q32(A/B) to PREW (+REW)
http://www.flashrom.org/pipermail/flashrom/2013-February/010533.html
- Eon EN25Q64 to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2013-January/010466.html
Miscellaneous:
- Fix superflouos line breaks in wiki mainboard and laptop output.
- Use the .nh (no hyphenation) command in the manpage to enforce
single-line URLs where useful.
- Reference the manpage (besides the Laptops wiki page) in the laptop warning.
- Minor output and whitespace fixes.
- Add Fidelix IDs.
- Add ISSE clones of PMC chips.
- Fix typo: EMST -> ESMT.
- Add ID of ESMT F25D08QA.
- Refine GigaDevice GD25Q series (missing voltages and comments).
- Use underscore instead of lower-case x as wildcard in Sharp chip names.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1650 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Update MX25L512 with references to and data about
MX25L512E, MX25V512, MX25V512C.
Update MX25L1005 with references to and data about
MX25L1005C, MX25L1006E.
Update MX25L2005 with references to and data about
MX25L2005C.
Update MX25L4005 with references to and data about
MX25L4005A, MX25L4005C.
Update MX25L8005 with references to and data about
MX25V8005.
Bonus: add chip IDs of MX25U1635E, MX25U3235E/F, MX25U6435E/F.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1647 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested Mainboards:
OK:
- Acer V75-M (used in IBM Aptiva 2170-G
http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html
- ASRock 4CoreDual-VSTA with W39V040FB
http://paste.flashrom.org/view.php?id=1446
- ASRock 775Dual-VSTA
http://www.flashrom.org/pipermail/flashrom/2012-December/010294.html
- ASRock E350M1/USB3
http://paste.flashrom.org/view.php?id=1465
- ASUS P5B-VM
http://www.flashrom.org/pipermail/flashrom/2012-December/010351.html
- ASUS SABERTOOTH 990FX R2.0
http://www.flashrom.org/pipermail/flashrom/2012-December/010210.html
- Elitegroup A928 (including a laptop whitelist board enable)
http://www.flashrom.org/pipermail/flashrom/2012-November/010119.html
- EVGA 122-CK-NF68
Reported by Stephanie Daugherty on IRC
http://paste.flashrom.org/view.php?id=1431
- GIGABYTE GA-A75M-UD2H
Reported by Soul_keeper on IRC
http://paste.flashrom.org/view.php?id=1490
- Intel D945GCNL
Add board enable to override laptop detection too.
http://www.flashrom.org/pipermail/flashrom/2012-December/010276.html
- MSI G33M (MS-7357)
http://www.flashrom.org/pipermail/flashrom/2012-October/010056.html
- Shuttle FB61
http://www.flashrom.org/pipermail/flashrom/2012-November/010105.html
- Tyan S4882 (Thunder K8QS Pro)
Reported on IRC
NOT OK:
Alienware Aurora-R2
http://www.flashrom.org/pipermail/flashrom/2012-December/010225.html
Biostar H61MU3
http://www.flashrom.org/pipermail/flashrom/2012-November/010144.html
Dell OptiPlex 7010
http://paste.flashrom.org/view.php?id=1481
Intel DH67CL
http://www.flashrom.org/pipermail/flashrom/2012-November/010112.html
Supermicro X9DRT-HF+
http://www.flashrom.org/pipermail/flashrom/2012-November/010155.html
Supermicro X9DRW
http://www.flashrom.org/pipermail/flashrom/2012-November/010150.html
Tested flash chips:
- Atmel AT25FS010 to PREW (+PREW)
http://paste.flashrom.org/view.php?id=1484
- Eon EN25F64 to PREW (+EW)
http://www.flashrom.org/pipermail/flashrom/2012-December/010210.html
- Spansion S25FL032A/P to PREW (+EW)
http://paste.flashrom.org/view.php?id=1510
- ST M29F002T/NT to PREW (+PREW)
http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html
- Winbond W25X10 to PREW (+PREW)
http://paste.flashrom.org/view.php?id=1486
Tested chipsets:
- NVIDIA MCP78S http://www.flashrom.org/pipermail/flashrom/2012-November/010176.html
- SiS 650 http://www.flashrom.org/pipermail/flashrom/2012-November/010119.html
Miscellaneous:
- Typo in GA-X58A-UDR3 (correct is GA-X58A-UD3R).
- Force 2-digit hex numbers in prints were it makes sense.
- Share code between enable_flash_sis530() and enable_flash_sis540().
- Some SST 25 series chips support both WRSR enable commands...
- S25FL032A and S25FL064A share the IDs with their P versions, so rename them.
- Fix a few memleaks in serprog.
- Dediprog uses UINT_MAX so include limits.h (fixes the Windows build of dediprog)
- Add (another) hint regarding the mandatory -p parameter to the manpage
to make Debian bug #690478 happy.
http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=690478
- Fix whitespace issues.
- On shutdown, reset count of registered programmers (by Nico Huber)
- Fix atahpt.c shutdown.
The order of pcidev_init, register_shutdown and rpci_write_* is important!
Thanks to Roy for reporting the problem and testing the fix.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1640 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This adds support for the following chips:
- AT25F512, AT25F512A, AT25F512B
- AT25F1024, AT25F1024A
- AT25F2048
- AT25F4096
Besides the definitions of the the chips in flashchips.c this includes
- a dedicated probing method (probe_spi_at25f)
- pretty printing methods (spi_prettyprint_status_register_at25f*), and
- unlocking methods (spi_disable_blockprotect_at25f*)
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1637 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This includes:
Bottom boot block:
* 16Mb/2MB:
QB25F160S33B8, QB25F016S33B8, QH25F160S33B8, QH25F016S33B8
* 32Mb/4MB:
QB25F320S33B8, QH25F320S33B8
* 64Mb/8MB:
QB25F640S33B8, QH25F640S33B8
Top boot block:
* 16Mb/2MB:
QB25F160S33T8, QB25F016S33T8, QH25F160S33T8, QH25F016S33T8
* 32Mb/4MB:
QB25F320S33T8, QH25F320S33T8
* 64Mb/8MB:
QB25F640S33T8, QH25F640S33T8
At least some seem to be marketed by other vendors (too?) but also with
Intel's vendor ID.
Besides a 0xC7 chip erase and a 0xD8 uniform 64kB block erase they
support also erasing the top/bottom 8 8kB blocks with opcode 0x40.
But since this command fails for all addresses outside those ranges,
it is not easily implemented with flashrom's current code base and
hence left out.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1636 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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W39F010 is a 128kB parallel 5V flash chip, 16k bootblocks.
W39L010 is a 128kB parallel 3.3V flash chip, 8k bootblocks.
W39L020 is a 256kB parallel 3.3V flash chip, 64k/16k bootblocks.
The W39F010 code was tested with a satasii programmer. The first write
attempt after an erase returned with verify failure, but the second
write attempt was succesful:
http://paste.flashrom.org/view.php?id=1418
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1620 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The 32Mb version has 1.8V and 3.0V versions, the smaller one 1.8V only
(or Numonyx/Micron forgot to publish it). Another difference is that the
16Mb chip has 32 kB subsectors (erase opcode 0x52). As long as there
are no funky configurations like for the 128Mb chips, we got the smaller
parts covered with this change.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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