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* Add user interface to activate the Bus Pirate pull-up resistors.stefanct2013-01-031-0/+14
| | | | | | | | | | | | | | | | | | | | | | | When working with some flash chips using the Bus Pirate programmer, the use of the Bus Pirate's on-board pull-up resistors is sometimes necessary. On v3 hardware the use of said pull-up resistors requires the user to apply a voltage to the VPU pin of the Bus Pirate, and then command it to use them. For v4 hardware which supports also fixed internal 3.3V and 5V sources no documentation could be found. Here is a link to information pertaining to what this patch does: http://dangerousprototypes.com/docs/SPI_(binary)#0100wxyz_-_Configure_peripherals_w.3Dpower.2C_x.3Dpull-ups.2C_y.3DAUX.2C_z.3DCS Bonus: small cleanup of superfluous stack variables. Signed-off-by: Brian Salcedo <bsalcedo@gmx.us> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Tested-by: Brian Salcedo <bsalcedo@gmx.us> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1641 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add a bunch of new/tested stuff and various small changes 16.stefanct2013-01-011-6/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested Mainboards: OK: - Acer V75-M (used in IBM Aptiva 2170-G http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html - ASRock 4CoreDual-VSTA with W39V040FB http://paste.flashrom.org/view.php?id=1446 - ASRock 775Dual-VSTA http://www.flashrom.org/pipermail/flashrom/2012-December/010294.html - ASRock E350M1/USB3 http://paste.flashrom.org/view.php?id=1465 - ASUS P5B-VM http://www.flashrom.org/pipermail/flashrom/2012-December/010351.html - ASUS SABERTOOTH 990FX R2.0 http://www.flashrom.org/pipermail/flashrom/2012-December/010210.html - Elitegroup A928 (including a laptop whitelist board enable) http://www.flashrom.org/pipermail/flashrom/2012-November/010119.html - EVGA 122-CK-NF68 Reported by Stephanie Daugherty on IRC http://paste.flashrom.org/view.php?id=1431 - GIGABYTE GA-A75M-UD2H Reported by Soul_keeper on IRC http://paste.flashrom.org/view.php?id=1490 - Intel D945GCNL Add board enable to override laptop detection too. http://www.flashrom.org/pipermail/flashrom/2012-December/010276.html - MSI G33M (MS-7357) http://www.flashrom.org/pipermail/flashrom/2012-October/010056.html - Shuttle FB61 http://www.flashrom.org/pipermail/flashrom/2012-November/010105.html - Tyan S4882 (Thunder K8QS Pro) Reported on IRC NOT OK: Alienware Aurora-R2 http://www.flashrom.org/pipermail/flashrom/2012-December/010225.html Biostar H61MU3 http://www.flashrom.org/pipermail/flashrom/2012-November/010144.html Dell OptiPlex 7010 http://paste.flashrom.org/view.php?id=1481 Intel DH67CL http://www.flashrom.org/pipermail/flashrom/2012-November/010112.html Supermicro X9DRT-HF+ http://www.flashrom.org/pipermail/flashrom/2012-November/010155.html Supermicro X9DRW http://www.flashrom.org/pipermail/flashrom/2012-November/010150.html Tested flash chips: - Atmel AT25FS010 to PREW (+PREW) http://paste.flashrom.org/view.php?id=1484 - Eon EN25F64 to PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2012-December/010210.html - Spansion S25FL032A/P to PREW (+EW) http://paste.flashrom.org/view.php?id=1510 - ST M29F002T/NT to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-December/010300.html - Winbond W25X10 to PREW (+PREW) http://paste.flashrom.org/view.php?id=1486 Tested chipsets: - NVIDIA MCP78S http://www.flashrom.org/pipermail/flashrom/2012-November/010176.html - SiS 650 http://www.flashrom.org/pipermail/flashrom/2012-November/010119.html Miscellaneous: - Typo in GA-X58A-UDR3 (correct is GA-X58A-UD3R). - Force 2-digit hex numbers in prints were it makes sense. - Share code between enable_flash_sis530() and enable_flash_sis540(). - Some SST 25 series chips support both WRSR enable commands... - S25FL032A and S25FL064A share the IDs with their P versions, so rename them. - Fix a few memleaks in serprog. - Dediprog uses UINT_MAX so include limits.h (fixes the Windows build of dediprog) - Add (another) hint regarding the mandatory -p parameter to the manpage to make Debian bug #690478 happy. http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=690478 - Fix whitespace issues. - On shutdown, reset count of registered programmers (by Nico Huber) - Fix atahpt.c shutdown. The order of pcidev_init, register_shutdown and rpci_write_* is important! Thanks to Roy for reporting the problem and testing the fix. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1640 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add a "device" parameter for Dediprog.stefanct2012-12-241-1/+10
| | | | | | | | | | | | | | | | | | | | | This patch adds a "device" parameter for Dediprog which enables use of multiple dediprogs connected to a single machine. Very handy for test racks. Example usage: flashrom -p dediprog:device=0 flashrom -p dediprog:device=1 etc... The patch was originally written by Nathan Laredo. Thanks to David Hendricks for submitting it upstream. Additional error handling, man page etc. by Stefan Tauner. Signed-off-by: Nathan Laredo <nil@google.com> Signed-off-by: David Hendricks <dhendrix@google.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1628 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for FT232H.stefanct2012-09-261-3/+3
| | | | | | | | | | | | For older versions of libftdi we define TYPE_232H ourselves and this seems to be enough to get at least basic support (and we don't need more than that AFAICT). Signed-off-by: Ilya A. Volynets-Evenbakh <ilya@total-knowledge.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1609 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for all 4 possible channels to the ft2232_spi programmer.stefanct2012-09-261-3/+3
| | | | | | | | | | | | | Add a check to validate the selected channel/interface, which not even libftdi seems to do yet. This patch changes default behavior: the new default channel/interface is A. Also, this patch uses the word 'channel' in addition or in place of 'interface' where possible without too much hassle because it is the term FTDI uses. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1608 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add a bunch of new/tested stuff and various small changes 14.stefanct2012-09-211-11/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Tested Mainboards: OK: - ASUS M3A78-EH http://www.flashrom.org/pipermail/flashrom/2010-October/005297.html - ASUS P2B-LS http://www.flashrom.org/pipermail/flashrom/2010-November/005506.html - Biostar TA790GX A3+ http://paste.flashrom.org/view.php?id=1350 - ECS 848P-A7 http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html - GIGABYTE GA-G41MT-S2PT Reported on IRC - GIGABYTE GA-H77-D3H Reported and tested by Alexander Gordeev on IRC. - Gigabyte GA-X79-UD5 http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html - Shuttle FN78S http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - VIA EITX-3000 Reported on IRC by Tuju NOT OK: - Dell PowerEdge C6220 (0HYFFG) http://www.flashrom.org/pipermail/flashrom/2012-September/009900.html - Foxconn Q45M http://www.flashrom.org/pipermail/flashrom/2012-September/009923.html - MSI MS-7309 (K9N6SGM-V) http://www.flashrom.org/pipermail/flashrom/2012-August/009712.html - Supermicro X9QRi-F+ http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - ZOTAC H61-ITX WiFi (H61ITX-A-E) http://www.flashrom.org/pipermail/flashrom/2012-August/009649.html ASUS CUSL2-C has been tested to be working with the board enable once implemented for the TUSL2-C board. They seem to have the same PCI IDs as shown in the links below. Since only the CUSL2-C board enable has been tested yet, we distinguish the two by DMI strings. http://paste.flashrom.org/view.php?id=1393 http://www.flashrom.org/pipermail/flashrom/attachments/20091206/ddca2c6c/attachment-0002.eml Tested flash chips: - Set EMST F25L008A to PREW (+PREW) http://www.flashrom.org/pipermail/flashrom/2012-August/009714.html - Set GigaDevice GD25Q64 to PREW (+PREW) http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commit;h=9e8ef49b1f626c2197e131fba6c5b65c8af4eeea - Set Macronix MX25L12805 to P (+P) http://www.flashrom.org/pipermail/flashrom/2012-September/009887.html - Set SST SST49LF003A/B to PREW (+EW) http://paste.flashrom.org/view.php?id=467 - Set Winbond W49V002FA to PREW (+EW) http://www.flashrom.org/pipermail/flashrom/2011-January/005781.html Tested chipsets: - Intel X79 (0x1d41) http://www.flashrom.org/pipermail/flashrom/2012-August/009811.html Board enables: - add ASUS P4P800-X Created by Idwer Vollering and tested by Mingsen Bao: http://paste.flashrom.org/view.php?id=467 - add DMI string to P4P800-VM Miscellaneous: - Add remaining Intel 7 series chipset (LPC) PCI IDs - Add generic SPI detection for chips from Winbond - Minor manpage changes - Minor other cleanups - Escape full stops after abbreviations in the manpage. - Add ICH9 and successors to spi_get_valid_read_addr Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1601 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Allow to select FTDI device by serial number.stefanct2012-09-171-0/+9
| | | | | | | | | | | | Requires libftdi > 0.5 (2004, commit ID a8f46ddc1595b1b07abfcce613acdafe5b8ddf9d). Idea stolen from chromiumos commit 5eb5624aeb7e2ee483e2fa0823c4e634c8ea3e68: http://git.chromium.org/gitweb/?p=chromiumos/third_party/flashrom.git;a=commit;h=5eb5624aeb7e2ee483e2fa0823c4e634c8ea3e68 Signed-off-by: Shik Chen <shik@chromium.org> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1599 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for Realtek RTL8169.stefanct2012-08-271-6/+4
| | | | | | | | | | | | | | And some cleanups including the removal of any left traces of the nicsmc1211 programmer. The RTL8169 still needs someone to test it, but it's good enough to be in the tree now. Signed-off-by: Sergey Lichack <shadowpilot34@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Mathias Krause <mathias.krause@secunet.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1586 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Refactor the -p internal:mainboard handling.stefanct2012-08-201-1/+1
| | | | | | | | | | | | | | | | This patch gets rid of some global variables and makes lots of bits along the code path that control the board enable execution more generic and clearer. From now on flashrom aborts on a few more occasions that should be safer for the user. For example it aborts if the enable function for the specified mainboard (enable) can not be found. Parts of the board_match_cbname refactoring were done by Carl-Daniel. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1577 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* serprog: Add support for setting the SPI frequency.stefanct2012-08-131-1/+11
| | | | | | | | | | | | | | | | | Introduce a new opcode (0x14) that sends the requested frequency as a 32b long value in Hertz to the programmer and receives the frequency eventually chosen by the programmer. The user can specify this with the programmer parameter "spispeed" (named after the similar parameter for the buspirate) including an optional suffix of 'M' or 'k' for specifying megahertz or kilohertz respectively (lowercase suffixes are also accepted). Thanks to Idwer and Uwe (and maybe others) for their feedback especially regarding the unit of frequency to use. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1571 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Always require the --programmer parameter on the command line if anyhailfinger2012-07-221-29/+46
| | | | | | | | | | | | flash chip access (probe/read/write/erase/...) is requested. Fix a few man page oddities as well. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1552 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Document --output in the man page.hailfinger2012-07-211-0/+27
| | | | | | | | | | Add an examples section to the man page. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1550 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* ft2232_spi.c: add frequency divisor parameter.stefanct2012-05-151-0/+11
| | | | | | | | | | | | This adds an optional argument when using the ft2232_spi programmer to set the frequency divisor. The valid values for the divisor is any even integer between 2 and 131072. Signed-off-by: Samir Ibradžić <sibradzic@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1537 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* dummyflasher.c: add support for SFDP by adding a new emulator chip: MX25L6436stefanct2012-05-071-0/+2
| | | | | | | | | | | The chip features a complete 1.0 SFDP JEDEC flash parameter table and also a vendor-specific extension table (defining voltages, lock bits etc). NB: the MX25L6436 uses the same RDID as the MX25L6405. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1534 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* dummyflasher: Add a status register to SPI chips.stefanct2012-05-061-0/+9
| | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1532 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add manpage entry for pony_spimkarcher2012-05-051-0/+23
| | | | | | | Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1530 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Document and enable the linux_spi driverhailfinger2012-02-161-0/+13
| | | | | | | | | | | The linux_spi driver is now enabled by default on Linux. A man page entry and a line in --list-supported output have been added. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1498 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Manpage improvements.stefanct2012-02-161-34/+77
| | | | | | | | | | | | | | | | | | | | | The sections describing the various options of the internal and dummy programmers have grown out of proportions. This patch adds some headlines to devide the unrelated topics a bit (with .TP commands). The previous indented paragraphs for the various programmers were transformed to subsections (.SS). Also, rephrase the documention related to laptops completely to make it less redundant and more informative. Document the laptop=this_is_not_a_laptop internal programmer parameter Change the contact info in the bugs section by removing the trac reference and adding IRC (and the pastebin) instead. Remove some superfluous white space and a .RE (restore indentation) command. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1497 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* ichspi.c: warn user and disable writes when a protected address range is ↵stefanct2012-02-161-0/+15
| | | | | | | | | | | | | | | detected. This includes not only the notorious read-only flash descriptors and locked ME regions, but also the more rarely used PRs (Protected Ranges). The user can enforce write support by specifying ich_spi_force=yes in the programmer options, but we don't tell him the exact syntax interactively. He has to read it up in the man page. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1494 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Warn of one-time programmable (OTP) memorystefanct2012-02-151-0/+13
| | | | | | | | | | | | | | | | | | Some flash chips contain OTP memory that we cannot read or write (yet). This prohibits us from cloning them, hence warn the user if we detect it. Not all variations of the tagged chips contain OTP memory. They are often only enabled on request or have there own ordering numbers. There is usually no way to distinguish them. Because this is a supposedly seldomly used feature the warning is shown in with dbg verbosity. The manpage is extended to describe the backgrounds a bit. This patch is based on the idea and code of Daniel Lenski. Signed-off-by: Daniel Lenski <dlenski@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1493 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* SPI command black-/ignorelisting for the flash chip emulator in the dummy ↵hailfinger2012-02-081-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | programmer Usage: flashrom -p dummy:spi_blacklist=commandlist flashrom -p dummy:spi_ignorelist=commandlist If commandlist is 0302, flashrom will refuse (blacklist) or ignore (ignorelist) command 0x03 (READ) and command 0x02 (WRITE). The commandlist can be up to 512 bytes (256 commands) long. Specifying flash chip emulation is a good idea to get useful results. Very useful for testing corner cases if you don't own a locked down Intel chipset and want to simulate such a thing. Example usage: dd if=/dev/zeros bs=1024k count=4 of=dummy_simulator.rom dd if=/dev/urandom bs=1024k count=4 of=randomimage.rom flashrom -p dummy:emulate=SST25VF032B,image=dummy_simulator.rom,\ spi_blacklist=20,spi_ignorelist=52 -w randomimage.rom -V Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: David Hendricks <dhendrix@google.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1490 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Replace --mainboard with -p internal:mainboardhailfinger2012-01-041-18/+10
| | | | | | | | | | | | | | | | | | | | | | | | | --mainboard is a relic from a time before external programmers and makes the CLI inconsistent. Use a programmer parameter instead and free up the short option -m. NOTE: The --list-supported-wiki output changed to use -p internal:mainboard= instead of -m The --list-supported output changed the heading of the mainboard list from Vendor Board Status Required option to Vendor Board Status Required value for -p internal:mainboard= Fix lb_vendor_dev_from_string() not to write to the supplied string. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1483 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* ichspi: add support for Intel Hardware Sequencingstefanct2011-11-081-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on the new opaque programmer framework this patch adds support for Intel Hardware Sequencing on ICH8 and its successors. By default (or when setting the ich_spi_mode option to auto) the module tries to use swseq and only activates hwseq if need be: - if important opcodes are inaccessible due to lockdown - if more than one flash chip is attached. The other options (swseq, hwseq) select the respective mode (if possible). A general description of Hardware Sequencing can be found in this blog entry: http://blogs.coreboot.org/blog/2011/06/11/gsoc-2011-flashrom-part-1/ Besides adding hwseq this patch also introduces these unrelated changes: - Fix enable_flash_ich_dc_spi to pass ERROR_FATAL from ich_init_spi. The whole error handling looks a bit odd to me, so this patch does change very little. Also, it does not touch the tunnelcreek method, which should be refactored anyway. - Add null-pointer guards to find_opcode and find_preop to matches the other opcode methods better: curopcodes == NULL has some meaning and is actively used/checked in other functions. TODO: adding real documentation when we have a directory for it Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1461 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for the GOEPEL PicoTAP programmer.uwe2011-10-201-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://www.goepel.com/en/jtagboundary-scan/hardware/picotap.html This device is actually a JTAG adapter, but since it uses standard FT2232 A interface pins, it can be easily used as SPI programmer (tested it here successfully). PicoTAP supports only 5V output, so one needs to reduce this to 3.3V in a same manner as DLP Design DLP-USB1232H, see http://flashrom.org/FT2232SPI_Programmer#DLP_Design_DLP-USB1232H for details. The PicoTAP pin-out is as follows: PicoTAP | SPI ---------+------- TCK | SCLK TMS | CS# TDI | SO TDO | SI /TRST | - GND | GND +5V | VCC, HOLD# & WP# after 3.3V regulator I managed to run PicoTAP in 10MHz, 15MHz and 30MHz modes (by forcing DIVIDE_BY), against SST25VF016B SPI flash, read/write/erase all worked fine (write seems somewhat slow). Signed-off-by: Samir Ibradžić <sibradzic@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1453 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* TIAO/DIYGADGET USB Multi-Protocol Adapter (TUMPA) support.uwe2011-10-141-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Thanks to TIAO/DIYGADGET for sponsoring a test device! This is an FTDI FT2232H based device which provides an easily accessible JTAG, SPI, I2C, serial breakout. The SPI part can be used to flash SPI flash chips using flashrom. http://www.diygadget.com/tiao-usb-multi-protocol-adapter-jtag-spi-i2c-serial.html http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_User%27s_Manual#SPI_Connector_1 There are two SPI connectors (pin headers) on the board: SPI1, which is connected to the FT2232H's A interface, and SPI2, which is connected to the chip's B interface. Both can be used to flash SPI chips: flashrom -p ft2232_spi:type=tumpa,port=A flashrom -p ft2232_spi:type=tumpa,port=B The default interface is A, so for SPI1 you can also just write: flashrom -p ft2232_spi:type=tumpa I tested all operations on both interfaces, everything works fine. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1451 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for Xilinx parallel III (DLC5) programing cablehailfinger2011-09-121-4/+18
| | | | | | | | | | | | The rayer_spi driver defaults to the RayeR cable, but selecting other predefined pin layouts with the type= parameter is possible: flashrom -p rayer_spi:type=xilinx Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1437 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* ft2232_spi: add support for the Dangerous Prototypes Bus Blasterstefanct2011-08-121-4/+4
| | | | | | | | | | | | | | | | Add support for the Dangerous Prototypes Bus Blaster (v1/v2). The new model is called "busblaster". So far only v2 has been tested, but since both v1 and v2 emulate a Amontec JTAGKEY in the default configuration, it is assumed that v1 should work fine as well. Information about the Busblaster can be found at: http://dangerousprototypes.com/docs/Bus_Blaster Signed-off-by: Steve Markgraf <steve@steve-m.de> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1412 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Introduce msg_*dbg2stefanct2011-08-041-2/+2
| | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1404 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* manpage: Document all ft2232_spi and serprog variants.uwe2011-07-281-8/+11
| | | | | | | | | Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix ICH FWH IDSEL setting with the fwh_idsel= internal programmerhailfinger2011-07-251-0/+17
| | | | | | | | | | | | | parameter. The code took 32 bits of input and wrote them to an 48 bit register, duplicating some values. Document the fwh_idsel= parameter in the man page. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1389 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Random manpage improvements and updates.uwe2011-07-251-14/+24
| | | | | | | | | Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1387 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Man page fixes:hailfinger2011-07-241-32/+74
| | | | | | | | | | | | | - Finish dummy programmer description - Add satamv programmer - Merge it87spi programmer into internal section - Cosmetics Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1383 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* flashrom.8: explain read accesses as part of the write operationstefanct2011-07-211-3/+10
| | | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1378 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Update the flashrom manpagestefanct2011-06-151-14/+22
| | | | | | | | | | | | | | | - Add missing entries for nicintel and satamv. - Add various programmers to those that support the 'pci=' option. - Small cosmetic, whitespace, grammar or consistency fixes. - Update the date of last change of the manpage. - Add Stefan Tauner to the list of authors. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Signed-off-by: Andrew Morgan <ziltro@ziltro.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1339 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* add support for Olimex programmers to ft2232_spistefanct2011-06-111-3/+4
| | | | | | | | | | - add support for Olimex' ARM-USB-TINY, ARM-USB-TINY-H, ARM-USB-OCD AND ARM-USB-OCD-H and adjust man page - minor string change ("First International Computer, Inc." -> "FIC") Signed-off-by: Pete Batard <pbatard@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1331 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* whitespace, documentation and other small stuffstefanct2011-05-191-1/+1
| | | | | | | | | | | | | | | this patch combines three previously posted patches in a revised form. one is even stolen from Stefan Reinauer (remove umlauts from man page). Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Signed-off-by: Stefan Reinauer <reinauer@google.com> some parts are Acked-by: Carl-Daniel Hailfinger<c-d.hailfinger.devel.2006@gmx.net> the rest is Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1317 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for the Open Graphics Project development card, OGD1, as ahailfinger2010-12-031-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI flash programmer. The project is in the the process of designing and making a complete, open source, graphics card. More info at http://wiki.opengraphics.org. The first development card is a PCI add in card containing a couple of FPGAs and a couple of serial flash chips (amongst other things). The FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its own flash and does not need to be programmed by flashrom - it ensures that the device can enumerate on the PCI bus without needing further configuration. The larger FPGA is the S3. This is configured from a large SPI flash (2 MBytes). The second SPI flash is used to store the VGA BIOS. It is smaller (128 KBytes). This patch adds support for programming either of the two SPI flash chips. The programmer device takes one configuration option which selects which of the two flash chips is accessed. This must be set to either "cprom" or "bprom". (The project refers to the two chips as "cprom" / "bprom", "s3" and "bios" are more readable alternatives). Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested for write. Signed-off-by: Mark Marshall <mark.marshall@csr.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1241 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Support setting the Dediprog SF100 SPI voltage.hailfinger2010-11-091-1/+14
| | | | | | | | | | | | Add a generic voltage parameter parser. Move tolower_string() from dummyflasher.c to flashrom.c to make it available everywhere. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1226 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* List the devices for all supported programmers in "flashrom -L" output.hailfinger2010-10-071-29/+34
| | | | | | | | | | | | Fix PCI device ID printing. Remove personal e-mail addresses from the man page, point people to flashrom@flashrom.org instead. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Update the author list in the man page.hailfinger2010-10-061-3/+33
| | | | | | | | | | Update programmer parameter documentation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Speed up RayeR SPIPGM driver in flashrom by a factor of 2.hailfinger2010-10-051-1/+13
| | | | | | | | | | | | | | | | Allow specification of an alternate base address with flashrom -p rayer_spi:iobase=0x278 Any base address is allowed as long as it is nonzero, below 65536 and a multiple of four. Read speed is now on par with original spipgm.exe. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Martin Rehak <rayer@seznam.cz> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1188 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add Intel Gigabit NIC SPI flashing support.uwe2010-09-031-0/+3
| | | | | | | | | | | | | | | | | | | | | | Tested on a 82541PI (0x8086, 0x107c) using 32-bit hardware. The last line in nicintel_request_spibus() could be changed so that FL_BUSY is used instead. Shortened sample log: [...] Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:03.0). Found chip "ST M25P10.RES" (128 KB, SPI) at physical address 0xfffe0000. Multiple flash chips were detected: M25P05.RES M25P10.RES Please specify which chip to use with the -c <chipname> option. [...] Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various cosmetic and coding-style fixes (trivial).uwe2010-08-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | - Fix incorrect whitespace, indentation, and coding style in some places. - Drop '/**' Doxygen comments, we don't use Doxygen. Even if we would use it, the comments are useless as we don't have any Doxygen markup in there. - Use consistent vendor name spelling as per current website (NVIDIA, abit, GIGABYTE). - Use consistent / common format for "Suited for:" lines in board_enable.c. - Add some missing 'void's in functions taking no arguments. - Add missing fullstops in sentences, remove them from non-sentences (lists). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for the Amontec JTAGkey2, seehailfinger2010-07-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | http://www.amontec.com/jtagkey2.shtml http://www.amontec.com/jtagkey.shtml This FTDI 2232H variant has an additional output enable, which will be set to its "on" (L) when CS is pulled low. But it lacks a power supply and you need an external 3.3V source. The attached patch adds "jtagkey" as "type" parameter for ft2232_spi. It should work with all JTAGkeys (JTAGkey, JTAGkey-tiny and JTAGkey2) but I only have a JTAGkey2 here for testing. Add all FT2232H/FT4232H based programmers to the list printed with flashrom -L Signed-off-by: Jörg Fischer <turboj@gmx.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for RayeR SPIPGM hardware as described inhailfinger2010-07-211-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://rayer.ic.cz/elektro/spipgm.htm To use the RayeR driver, run flashrom -p rayer_spi -V Known bugs/limitations: - Won't compile/work on non-x86 architectures. - Will always use direct port I/O access. Log follows: flashrom v0.9.2-r1039 on MS-DOS 7 (i686), built with libpci 3.1.5, GCC 4.3.2, little endian Calibrating delay loop... OK. Initializing rayer_bitbang_spi programmer Using port 0x378 as I/O base for parallel port access. ... Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2015 ... Found chip "Macronix MX25L1605" (2048 KB, SPI) at physical address 0xffe00000. ... No operations were specified. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Martin Rehak <rayer@seznam.cz> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various places in the flashrom source feature custom parameterhailfinger2010-07-061-11/+12
| | | | | | | | | | | | | | | | | | | | extraction from programmer_param. This led to wildly differing syntax for programmer parameters, and it also voids pretty much every assumption you could make about programmer_param. The latter is a problem for libflashrom. Use extract_param everywhere, clean up related code and make it more foolproof. Add two instances of exit(1) where we have no option to return an error. Remove six instances of exit(1) where returning an error was possible. WARNING: This changes programmer parameter syntax for a few programmers! Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add OpenBSD support.hailfinger2010-07-021-1/+46
| | | | | | | | | | | | | | | Add a requirements section to the man page which lists the needed access permissions for each programmer. This feature needs my pciutils/libpci 8/16-bit write emulation patch at http://marc.info/?l=openbsd-ports&m=127780030728045 titled [PATCH] Fix pciutils non-32bit PCI write on OpenBSD Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stuart Henderson <sthen@openbsd.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various manpage fixes and improvements.uwe2010-06-071-70/+114
| | | | | | | | | | | | | | | | | | | | | | | | - Use [<vendor>:]<board>], not [<vendor>:]<part>], which is more clear. - Mention TSOP48 chips in the description. - Highlight various additional parts in the manpage which were missing so far (i.e., make them bold), including cmdline switches and others. - Mention that you can use -VV. - Fix name of the now-renamed 'Supported mainboards' section in -L output. - Mention that ft2232_spi and buspirate_spi only support SPI chips. - Readability and cosmetic improvements, add missing escapes, fix typos. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1038 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* So far, we have up to 4 different names for the same thing (ignoringhailfinger2010-05-311-6/+6
| | | | | | | | | | | | | | | | | | | | | | capitalization): CONFIG_FT2232SPI (makefile config option) FT2232_SPI_SUPPORT (#define) ft2232spi (programmer name) ft2232_spi.c (programmer file) Use CONFIG_* with underscores for makefile config options and #defines and kill the useless _SUPPORT idiom. Use lowercase names with underscores for programmer names and programmer files. With this, you can run "grep -i ft2232_spi" and find everything related to the ft2232_spi driver. Same applies to all other programmers. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various nicrealtek fixes:uwe2010-05-241-1/+5
| | | | | | | | | | | | | | | - Add missing entries for 'flashrom -L' output and wiki output. - Add missing entries in the manpage. - nicrealtek.c: Coding style fixes and cosmetics. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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