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* ichspi.c: warn user and disable writes when a protected address range is ↵stefanct2012-02-161-0/+15
| | | | | | | | | | | | | | | detected. This includes not only the notorious read-only flash descriptors and locked ME regions, but also the more rarely used PRs (Protected Ranges). The user can enforce write support by specifying ich_spi_force=yes in the programmer options, but we don't tell him the exact syntax interactively. He has to read it up in the man page. Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1494 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Warn of one-time programmable (OTP) memorystefanct2012-02-151-0/+13
| | | | | | | | | | | | | | | | | | Some flash chips contain OTP memory that we cannot read or write (yet). This prohibits us from cloning them, hence warn the user if we detect it. Not all variations of the tagged chips contain OTP memory. They are often only enabled on request or have there own ordering numbers. There is usually no way to distinguish them. Because this is a supposedly seldomly used feature the warning is shown in with dbg verbosity. The manpage is extended to describe the backgrounds a bit. This patch is based on the idea and code of Daniel Lenski. Signed-off-by: Daniel Lenski <dlenski@gmail.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1493 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* SPI command black-/ignorelisting for the flash chip emulator in the dummy ↵hailfinger2012-02-081-0/+22
| | | | | | | | | | | | | | | | | | | | | | | | | | | | programmer Usage: flashrom -p dummy:spi_blacklist=commandlist flashrom -p dummy:spi_ignorelist=commandlist If commandlist is 0302, flashrom will refuse (blacklist) or ignore (ignorelist) command 0x03 (READ) and command 0x02 (WRITE). The commandlist can be up to 512 bytes (256 commands) long. Specifying flash chip emulation is a good idea to get useful results. Very useful for testing corner cases if you don't own a locked down Intel chipset and want to simulate such a thing. Example usage: dd if=/dev/zeros bs=1024k count=4 of=dummy_simulator.rom dd if=/dev/urandom bs=1024k count=4 of=randomimage.rom flashrom -p dummy:emulate=SST25VF032B,image=dummy_simulator.rom,\ spi_blacklist=20,spi_ignorelist=52 -w randomimage.rom -V Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: David Hendricks <dhendrix@google.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1490 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Replace --mainboard with -p internal:mainboardhailfinger2012-01-041-18/+10
| | | | | | | | | | | | | | | | | | | | | | | | | --mainboard is a relic from a time before external programmers and makes the CLI inconsistent. Use a programmer parameter instead and free up the short option -m. NOTE: The --list-supported-wiki output changed to use -p internal:mainboard= instead of -m The --list-supported output changed the heading of the mainboard list from Vendor Board Status Required option to Vendor Board Status Required value for -p internal:mainboard= Fix lb_vendor_dev_from_string() not to write to the supplied string. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1483 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* ichspi: add support for Intel Hardware Sequencingstefanct2011-11-081-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Based on the new opaque programmer framework this patch adds support for Intel Hardware Sequencing on ICH8 and its successors. By default (or when setting the ich_spi_mode option to auto) the module tries to use swseq and only activates hwseq if need be: - if important opcodes are inaccessible due to lockdown - if more than one flash chip is attached. The other options (swseq, hwseq) select the respective mode (if possible). A general description of Hardware Sequencing can be found in this blog entry: http://blogs.coreboot.org/blog/2011/06/11/gsoc-2011-flashrom-part-1/ Besides adding hwseq this patch also introduces these unrelated changes: - Fix enable_flash_ich_dc_spi to pass ERROR_FATAL from ich_init_spi. The whole error handling looks a bit odd to me, so this patch does change very little. Also, it does not touch the tunnelcreek method, which should be refactored anyway. - Add null-pointer guards to find_opcode and find_preop to matches the other opcode methods better: curopcodes == NULL has some meaning and is actively used/checked in other functions. TODO: adding real documentation when we have a directory for it Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1461 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for the GOEPEL PicoTAP programmer.uwe2011-10-201-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://www.goepel.com/en/jtagboundary-scan/hardware/picotap.html This device is actually a JTAG adapter, but since it uses standard FT2232 A interface pins, it can be easily used as SPI programmer (tested it here successfully). PicoTAP supports only 5V output, so one needs to reduce this to 3.3V in a same manner as DLP Design DLP-USB1232H, see http://flashrom.org/FT2232SPI_Programmer#DLP_Design_DLP-USB1232H for details. The PicoTAP pin-out is as follows: PicoTAP | SPI ---------+------- TCK | SCLK TMS | CS# TDI | SO TDO | SI /TRST | - GND | GND +5V | VCC, HOLD# & WP# after 3.3V regulator I managed to run PicoTAP in 10MHz, 15MHz and 30MHz modes (by forcing DIVIDE_BY), against SST25VF016B SPI flash, read/write/erase all worked fine (write seems somewhat slow). Signed-off-by: Samir Ibradžić <sibradzic@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1453 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* TIAO/DIYGADGET USB Multi-Protocol Adapter (TUMPA) support.uwe2011-10-141-2/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Thanks to TIAO/DIYGADGET for sponsoring a test device! This is an FTDI FT2232H based device which provides an easily accessible JTAG, SPI, I2C, serial breakout. The SPI part can be used to flash SPI flash chips using flashrom. http://www.diygadget.com/tiao-usb-multi-protocol-adapter-jtag-spi-i2c-serial.html http://www.tiaowiki.com/w/TIAO_USB_Multi_Protocol_Adapter_User%27s_Manual#SPI_Connector_1 There are two SPI connectors (pin headers) on the board: SPI1, which is connected to the FT2232H's A interface, and SPI2, which is connected to the chip's B interface. Both can be used to flash SPI chips: flashrom -p ft2232_spi:type=tumpa,port=A flashrom -p ft2232_spi:type=tumpa,port=B The default interface is A, so for SPI1 you can also just write: flashrom -p ft2232_spi:type=tumpa I tested all operations on both interfaces, everything works fine. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1451 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for Xilinx parallel III (DLC5) programing cablehailfinger2011-09-121-4/+18
| | | | | | | | | | | | The rayer_spi driver defaults to the RayeR cable, but selecting other predefined pin layouts with the type= parameter is possible: flashrom -p rayer_spi:type=xilinx Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1437 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* ft2232_spi: add support for the Dangerous Prototypes Bus Blasterstefanct2011-08-121-4/+4
| | | | | | | | | | | | | | | | Add support for the Dangerous Prototypes Bus Blaster (v1/v2). The new model is called "busblaster". So far only v2 has been tested, but since both v1 and v2 emulate a Amontec JTAGKEY in the default configuration, it is assumed that v1 should work fine as well. Information about the Busblaster can be found at: http://dangerousprototypes.com/docs/Bus_Blaster Signed-off-by: Steve Markgraf <steve@steve-m.de> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1412 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Introduce msg_*dbg2stefanct2011-08-041-2/+2
| | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1404 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* manpage: Document all ft2232_spi and serprog variants.uwe2011-07-281-8/+11
| | | | | | | | | Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1398 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix ICH FWH IDSEL setting with the fwh_idsel= internal programmerhailfinger2011-07-251-0/+17
| | | | | | | | | | | | | parameter. The code took 32 bits of input and wrote them to an 48 bit register, duplicating some values. Document the fwh_idsel= parameter in the man page. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1389 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Random manpage improvements and updates.uwe2011-07-251-14/+24
| | | | | | | | | Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1387 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Man page fixes:hailfinger2011-07-241-32/+74
| | | | | | | | | | | | | - Finish dummy programmer description - Add satamv programmer - Merge it87spi programmer into internal section - Cosmetics Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1383 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* flashrom.8: explain read accesses as part of the write operationstefanct2011-07-211-3/+10
| | | | | | | | Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Paul Menzel <paulepanter@users.sourceforge.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1378 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Update the flashrom manpagestefanct2011-06-151-14/+22
| | | | | | | | | | | | | | | - Add missing entries for nicintel and satamv. - Add various programmers to those that support the 'pci=' option. - Small cosmetic, whitespace, grammar or consistency fixes. - Update the date of last change of the manpage. - Add Stefan Tauner to the list of authors. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Signed-off-by: Andrew Morgan <ziltro@ziltro.com> Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1339 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* add support for Olimex programmers to ft2232_spistefanct2011-06-111-3/+4
| | | | | | | | | | - add support for Olimex' ARM-USB-TINY, ARM-USB-TINY-H, ARM-USB-OCD AND ARM-USB-OCD-H and adjust man page - minor string change ("First International Computer, Inc." -> "FIC") Signed-off-by: Pete Batard <pbatard@gmail.com> Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1331 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* whitespace, documentation and other small stuffstefanct2011-05-191-1/+1
| | | | | | | | | | | | | | | this patch combines three previously posted patches in a revised form. one is even stolen from Stefan Reinauer (remove umlauts from man page). Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> Signed-off-by: Stefan Reinauer <reinauer@google.com> some parts are Acked-by: Carl-Daniel Hailfinger<c-d.hailfinger.devel.2006@gmx.net> the rest is Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1317 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for the Open Graphics Project development card, OGD1, as ahailfinger2010-12-031-0/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI flash programmer. The project is in the the process of designing and making a complete, open source, graphics card. More info at http://wiki.opengraphics.org. The first development card is a PCI add in card containing a couple of FPGAs and a couple of serial flash chips (amongst other things). The FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its own flash and does not need to be programmed by flashrom - it ensures that the device can enumerate on the PCI bus without needing further configuration. The larger FPGA is the S3. This is configured from a large SPI flash (2 MBytes). The second SPI flash is used to store the VGA BIOS. It is smaller (128 KBytes). This patch adds support for programming either of the two SPI flash chips. The programmer device takes one configuration option which selects which of the two flash chips is accessed. This must be set to either "cprom" or "bprom". (The project refers to the two chips as "cprom" / "bprom", "s3" and "bios" are more readable alternatives). Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested for write. Signed-off-by: Mark Marshall <mark.marshall@csr.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1241 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Support setting the Dediprog SF100 SPI voltage.hailfinger2010-11-091-1/+14
| | | | | | | | | | | | Add a generic voltage parameter parser. Move tolower_string() from dummyflasher.c to flashrom.c to make it available everywhere. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1226 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* List the devices for all supported programmers in "flashrom -L" output.hailfinger2010-10-071-29/+34
| | | | | | | | | | | | Fix PCI device ID printing. Remove personal e-mail addresses from the man page, point people to flashrom@flashrom.org instead. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Update the author list in the man page.hailfinger2010-10-061-3/+33
| | | | | | | | | | Update programmer parameter documentation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Speed up RayeR SPIPGM driver in flashrom by a factor of 2.hailfinger2010-10-051-1/+13
| | | | | | | | | | | | | | | | Allow specification of an alternate base address with flashrom -p rayer_spi:iobase=0x278 Any base address is allowed as long as it is nonzero, below 65536 and a multiple of four. Read speed is now on par with original spipgm.exe. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Martin Rehak <rayer@seznam.cz> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1188 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add Intel Gigabit NIC SPI flashing support.uwe2010-09-031-0/+3
| | | | | | | | | | | | | | | | | | | | | | Tested on a 82541PI (0x8086, 0x107c) using 32-bit hardware. The last line in nicintel_request_spibus() could be changed so that FL_BUSY is used instead. Shortened sample log: [...] Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:03.0). Found chip "ST M25P10.RES" (128 KB, SPI) at physical address 0xfffe0000. Multiple flash chips were detected: M25P05.RES M25P10.RES Please specify which chip to use with the -c <chipname> option. [...] Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various cosmetic and coding-style fixes (trivial).uwe2010-08-081-1/+1
| | | | | | | | | | | | | | | | | | | | | | | - Fix incorrect whitespace, indentation, and coding style in some places. - Drop '/**' Doxygen comments, we don't use Doxygen. Even if we would use it, the comments are useless as we don't have any Doxygen markup in there. - Use consistent vendor name spelling as per current website (NVIDIA, abit, GIGABYTE). - Use consistent / common format for "Suited for:" lines in board_enable.c. - Add some missing 'void's in functions taking no arguments. - Add missing fullstops in sentences, remove them from non-sentences (lists). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for the Amontec JTAGkey2, seehailfinger2010-07-291-4/+4
| | | | | | | | | | | | | | | | | | | | | | http://www.amontec.com/jtagkey2.shtml http://www.amontec.com/jtagkey.shtml This FTDI 2232H variant has an additional output enable, which will be set to its "on" (L) when CS is pulled low. But it lacks a power supply and you need an external 3.3V source. The attached patch adds "jtagkey" as "type" parameter for ft2232_spi. It should work with all JTAGkeys (JTAGkey, JTAGkey-tiny and JTAGkey2) but I only have a JTAGkey2 here for testing. Add all FT2232H/FT4232H based programmers to the list printed with flashrom -L Signed-off-by: Jörg Fischer <turboj@gmx.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1119 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for RayeR SPIPGM hardware as described inhailfinger2010-07-211-0/+10
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://rayer.ic.cz/elektro/spipgm.htm To use the RayeR driver, run flashrom -p rayer_spi -V Known bugs/limitations: - Won't compile/work on non-x86 architectures. - Will always use direct port I/O access. Log follows: flashrom v0.9.2-r1039 on MS-DOS 7 (i686), built with libpci 3.1.5, GCC 4.3.2, little endian Calibrating delay loop... OK. Initializing rayer_bitbang_spi programmer Using port 0x378 as I/O base for parallel port access. ... Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2015 ... Found chip "Macronix MX25L1605" (2048 KB, SPI) at physical address 0xffe00000. ... No operations were specified. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Martin Rehak <rayer@seznam.cz> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various places in the flashrom source feature custom parameterhailfinger2010-07-061-11/+12
| | | | | | | | | | | | | | | | | | | | extraction from programmer_param. This led to wildly differing syntax for programmer parameters, and it also voids pretty much every assumption you could make about programmer_param. The latter is a problem for libflashrom. Use extract_param everywhere, clean up related code and make it more foolproof. Add two instances of exit(1) where we have no option to return an error. Remove six instances of exit(1) where returning an error was possible. WARNING: This changes programmer parameter syntax for a few programmers! Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add OpenBSD support.hailfinger2010-07-021-1/+46
| | | | | | | | | | | | | | | Add a requirements section to the man page which lists the needed access permissions for each programmer. This feature needs my pciutils/libpci 8/16-bit write emulation patch at http://marc.info/?l=openbsd-ports&m=127780030728045 titled [PATCH] Fix pciutils non-32bit PCI write on OpenBSD Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stuart Henderson <sthen@openbsd.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various manpage fixes and improvements.uwe2010-06-071-70/+114
| | | | | | | | | | | | | | | | | | | | | | | | - Use [<vendor>:]<board>], not [<vendor>:]<part>], which is more clear. - Mention TSOP48 chips in the description. - Highlight various additional parts in the manpage which were missing so far (i.e., make them bold), including cmdline switches and others. - Mention that you can use -VV. - Fix name of the now-renamed 'Supported mainboards' section in -L output. - Mention that ft2232_spi and buspirate_spi only support SPI chips. - Readability and cosmetic improvements, add missing escapes, fix typos. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1038 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* So far, we have up to 4 different names for the same thing (ignoringhailfinger2010-05-311-6/+6
| | | | | | | | | | | | | | | | | | | | | | capitalization): CONFIG_FT2232SPI (makefile config option) FT2232_SPI_SUPPORT (#define) ft2232spi (programmer name) ft2232_spi.c (programmer file) Use CONFIG_* with underscores for makefile config options and #defines and kill the useless _SUPPORT idiom. Use lowercase names with underscores for programmer names and programmer files. With this, you can run "grep -i ft2232_spi" and find everything related to the ft2232_spi driver. Same applies to all other programmers. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various nicrealtek fixes:uwe2010-05-241-1/+5
| | | | | | | | | | | | | | | - Add missing entries for 'flashrom -L' output and wiki output. - Add missing entries in the manpage. - nicrealtek.c: Coding style fixes and cosmetics. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix assorted documentation, frontend and printing bugs.hailfinger2010-05-151-23/+29
| | | | | | | | | | | Change the command line interface to make file names positional. Add more sanity checks to the command line parser. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* --force may have been a good idea back when only developers were usinghailfinger2010-04-281-8/+47
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flashrom, but over the last few months we've seen too many people who incorrectly believed that --force would solve anything. One of the problems is that --force had multiple meanings: - Force chip read by faking probe success. - Force chip access even if the chip is bigger than max decode size for the flash bus. - Force erase even if erase is known bad. - Force write even if write is known bad. - Force writing even if cbtable tells us that this is the wrong image for this board. This patch cleans up --force usage: - Remove any suggestions to use --force for probe/read from flashrom output. - Don't talk about "success" or "Found chip" if the chip is forced. - Add a new internal programmer parameter boardmismatch=force. This overrides any mismatch detection from cbtable/image comparisons. - Add a new internal programmer parameter laptop=force_I_want_a_brick. - Adjust the documentation for --force. - Clean up the man page a bit whereever it talks about --force or laptops. Additional changes in this patch: - Add warnings about laptops to the documentation. - Abort if a laptop is detected. Can be overridden with the programmer parameter mentioned above. - Add "Portable" to the list of DMI strings indicating laptops. - Check if a chip specified with -c is known to flashrom. - Programmer parameter reliability and consistency fixes. - More paranoid self-checks. - Improve documentation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@996 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Polish the flashrom code comments and outputs a bit.uwe2010-03-251-3/+3
| | | | | | | | | | | | | - Fix a number of typos (found via ispell). - Use correct vendor names (as per their websites) consistently. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Autodetect ITE IT87* LPC->SPI translation on all boards without the needhailfinger2010-03-251-2/+11
| | | | | | | | | | | | | | | | | | | | | | | | for a board enable. Move boards which had an IT87* SPI board enable from the board enable list to the OK list. Mark the Gigabyte GA-MA78GPM-DS2H as OK. Change the it87spi forced port parameter to it87spiport=... Fix incorrect indentation in the man page. Tested by Ward Vandewege on both variants of the Gigabyte GA-M57SLI-S4 http://www.flashrom.org/pipermail/flashrom/2010-March/002712.html Tested by 李彥學 (Ian-Xue Li) on the Gigabyte GA-MA78GPM-DS2H http://www.flashrom.org/pipermail/flashrom/2010-March/002723.html Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Patch: Manpage: Move description of layout file into the right placemkarcher2010-03-131-24/+24
| | | | | | | | | | Move the description of the layout file out of the --chip option into the --layout option. Signed-off-by: Joerg Mayer <jmayer@loplof.de> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Tell users to probe/backup firstmkarcher2010-03-121-1/+5
| | | | | | | Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@931 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Move untested board enable documentation to manpagemkarcher2010-03-071-0/+41
| | | | | | | | | | This also checks the testedness of boards in all cases, not just for PCI/DMI detection. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Refactor man pagemkarcher2010-03-071-37/+49
| | | | | | | | | | | | | | | | | | | This patch puts the description of the different programmers into a separate section of the manpage instead of having them one after the other without visual structuring in the description of "-p". It is made as a preparation of a man-page patch that adds the background of board enables into flashrom.8 that would really blow up the OPTIONS section. The only differences in content are: - The parameter for serprog is mandatory, not optional - Default behaviour of it87spi (using BIOS-set I/O address) is mentioned. - Default speed of buspiratespi is mentioned. Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@922 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add initial (non-working) code for Highpoint ATA/RAID controllers.uwe2010-02-211-1/+4
| | | | | | | | | | | | It's disabled by default. The current status is detailed at: http://www.flashrom.org/pipermail/flashrom/2010-January/001828.html Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* drop known broken email addresses.stepan2010-01-031-3/+3
| | | | | | | | | Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@825 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add the ability to set Bus Pirate SPI speed via the command line.hailfinger2009-11-241-0/+12
| | | | | | | | | | | | | | | | | | | | | | | Example usage: flashrom -p buspiratespi:spispeed=2.6MHz,dev=/dev/foo flashrom -p buspiratespi:dev=/dev/foo,spispeed=2.6M Refactor programmer option parsing (this allows cleanups in other programmers as well). Increase SPI read size from 8 to 12 bytes (current single-transaction limit of the Bus Pirate raw SPI protocol). Add Bus Pirate to the list of programmers supporting 4 byte RDID. Add Bus Pirate syntax to the man page. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com> Tested-by: Sean Nelson <audiohacked@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add initial support for flashing some NVIDIA graphics cards.uwe2009-09-301-0/+3
| | | | | | | | | | | | | | | | | | | | | | The new option is '-p gfxnvidia', rest of the interface is as usual. I tested a successful identify and read on a "RIVA TNT2 Model 64/Model 64 Pro" card for now, erase and write did NOT work properly so far! Please do not attempt to write/erase cards yet, unless you can recover! In addition to the NVIDIA handling code it was required to call programmer_shutdown() in a lot more places, otherwise the graphics card will be disabled in the init function, but never enabled again as the shutdown function is not called. The shutdown handling may be changed to use atexit() later. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Luc Verhaegen <libv@skynet.be> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for parallel flash on Dr. Kaiser PC-Waechter PCI devices.uwe2009-09-021-0/+2
| | | | | | | | | | | | | | | | The vendor sold different designs under that name, the patch works with the one that has an Actel FPGA as PCI-to-Flash bridge. The Flash chip is a "Macronix MX29F001B" (128 KB, parallel) soldered directly to the PCB. Flash operations (PROBE, READ, ERASE, WRITE) work as expected. Signed-off-by: TURBO J <turboj@gmx.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Current programmer parameter syntax ishailfinger2009-08-191-8/+8
| | | | | | | | | | | | | | | | | | | | -p programmer=parameter Unfortunately, many parameters are of the form variable=val, so we get commandlines like this: flashrom -p it87spi=port=0x820 and this looks horrible. Using : instead of = would make such parameters look better: flashrom -p it87spi:port=0x820 As a side benefit, this patch mentions the programmer name in the error message if it is unknown. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add serprog documentation to the manpage.hailfinger2009-08-181-5/+20
| | | | | | | | Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@689 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Tidy up docs before release. Don't mention coreboot.org without context.hailfinger2009-08-181-4/+0
| | | | | | | | Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@688 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* The project's new home is flashrom.org now. Change all occurences in thestepan2009-07-301-4/+4
| | | | | | | | | | | source code and documentation accordingly. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@669 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix incorrect manpage (trivial).uwe2009-07-111-3/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The flashrom manpage currently says "-w, --write: Write file into flash ROM (default when <file> is specified)". This is no longer true for recent flashrom versions, which only write if you explicitly use the -w option. Proof: $ flashrom coreboot.rom flashrom v0.9.0-r631 No coreboot table found. Found chipset "Intel ICH7/ICH7R", enabling flash write... OK. Found board "Kontron 986LCD-M", enabling flash write... OK. Calibrating delay loop... OK. Found chip "PMC Pm49FL004" (512 KB) at physical address 0xfff80000. No operations were specified. Thus, fix manpage accordingly. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@649 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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