| Commit message (Collapse) | Author | Age | Files | Lines |
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- Add missing entries for 'flashrom -L' output and wiki output.
- Add missing entries in the manpage.
- nicrealtek.c: Coding style fixes and cosmetics.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Change the command line interface to make file names positional.
Add more sanity checks to the command line parser.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom, but over the last few months we've seen too many people who
incorrectly believed that --force would solve anything.
One of the problems is that --force had multiple meanings:
- Force chip read by faking probe success.
- Force chip access even if the chip is bigger than max decode size for
the flash bus.
- Force erase even if erase is known bad.
- Force write even if write is known bad.
- Force writing even if cbtable tells us that this is the wrong image
for this board.
This patch cleans up --force usage:
- Remove any suggestions to use --force for probe/read from flashrom
output.
- Don't talk about "success" or "Found chip" if the chip is forced.
- Add a new internal programmer parameter boardmismatch=force. This
overrides any mismatch detection from cbtable/image comparisons.
- Add a new internal programmer parameter laptop=force_I_want_a_brick.
- Adjust the documentation for --force.
- Clean up the man page a bit whereever it talks about --force or
laptops.
Additional changes in this patch:
- Add warnings about laptops to the documentation.
- Abort if a laptop is detected. Can be overridden with the programmer
parameter mentioned above.
- Add "Portable" to the list of DMI strings indicating laptops.
- Check if a chip specified with -c is known to flashrom.
- Programmer parameter reliability and consistency fixes.
- More paranoid self-checks.
- Improve documentation.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@996 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Fix a number of typos (found via ispell).
- Use correct vendor names (as per their websites) consistently.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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for a board enable.
Move boards which had an IT87* SPI board enable from the board enable
list to the OK list.
Mark the Gigabyte GA-MA78GPM-DS2H as OK.
Change the it87spi forced port parameter to it87spiport=...
Fix incorrect indentation in the man page.
Tested by Ward Vandewege on both variants of the Gigabyte GA-M57SLI-S4
http://www.flashrom.org/pipermail/flashrom/2010-March/002712.html
Tested by 李彥學 (Ian-Xue Li) on the Gigabyte GA-MA78GPM-DS2H
http://www.flashrom.org/pipermail/flashrom/2010-March/002723.html
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Move the description of the layout file out of the --chip option
into the --layout option.
Signed-off-by: Joerg Mayer <jmayer@loplof.de>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@931 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This also checks the testedness of boards in all cases, not just for
PCI/DMI detection.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch puts the description of the different programmers into a
separate section of the manpage instead of having them one after the
other without visual structuring in the description of "-p". It is
made as a preparation of a man-page patch that adds the background
of board enables into flashrom.8 that would really blow up the OPTIONS
section.
The only differences in content are:
- The parameter for serprog is mandatory, not optional
- Default behaviour of it87spi (using BIOS-set I/O address) is mentioned.
- Default speed of buspiratespi is mentioned.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@922 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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It's disabled by default. The current status is detailed at:
http://www.flashrom.org/pipermail/flashrom/2010-January/001828.html
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@825 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Example usage:
flashrom -p buspiratespi:spispeed=2.6MHz,dev=/dev/foo
flashrom -p buspiratespi:dev=/dev/foo,spispeed=2.6M
Refactor programmer option parsing (this allows cleanups in other
programmers as well).
Increase SPI read size from 8 to 12 bytes (current single-transaction
limit of the Bus Pirate raw SPI protocol).
Add Bus Pirate to the list of programmers supporting 4 byte RDID.
Add Bus Pirate syntax to the man page.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
Tested-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@776 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The new option is '-p gfxnvidia', rest of the interface is as usual.
I tested a successful identify and read on a "RIVA TNT2 Model 64/Model 64 Pro"
card for now, erase and write did NOT work properly so far!
Please do not attempt to write/erase cards yet, unless you can recover!
In addition to the NVIDIA handling code it was required to call
programmer_shutdown() in a lot more places, otherwise the graphics card
will be disabled in the init function, but never enabled again as the
shutdown function is not called.
The shutdown handling may be changed to use atexit() later.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Luc Verhaegen <libv@skynet.be>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The vendor sold different designs under that name, the patch works with
the one that has an Actel FPGA as PCI-to-Flash bridge.
The Flash chip is a "Macronix MX29F001B" (128 KB, parallel) soldered
directly to the PCB.
Flash operations (PROBE, READ, ERASE, WRITE) work as expected.
Signed-off-by: TURBO J <turboj@gmx.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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-p programmer=parameter
Unfortunately, many parameters are of the form variable=val, so we get
commandlines like this:
flashrom -p it87spi=port=0x820
and this looks horrible.
Using : instead of = would make such parameters look better:
flashrom -p it87spi:port=0x820
As a side benefit, this patch mentions the programmer name in the error
message if it is unknown.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@693 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@689 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@688 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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source code and documentation accordingly.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@669 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The flashrom manpage currently says "-w, --write: Write file into flash
ROM (default when <file> is specified)". This is no longer true for recent
flashrom versions, which only write if you explicitly use the -w option.
Proof:
$ flashrom coreboot.rom
flashrom v0.9.0-r631
No coreboot table found.
Found chipset "Intel ICH7/ICH7R", enabling flash write... OK.
Found board "Kontron 986LCD-M", enabling flash write... OK.
Calibrating delay loop... OK.
Found chip "PMC Pm49FL004" (512 KB) at physical address 0xfff80000.
No operations were specified.
Thus, fix manpage accordingly.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@649 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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standalone programmer mode. If the parameter is set, the IT87* SPI
driver will set the I/O base port of the IT87* SPI controller interface
to the port specified in the parameter.
Usage:
flashrom -p it87spi=port=0x820
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@646 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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interface A vs. B.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Jakob Bornecrantz <wallbraker@gmail.com>
Acked-by: Jakob Bornecrantz <wallbraker@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@638 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Properly escape '-' chars in manpage.
- Fix typo in chipset_enable.c.
- Drop useless 'return' in chip_readn().
- Random other whitespace or cosmetic fixes.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@636 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Should this be undesireable because of speed reasons, --noverify can be
used to suppress an auto-verify.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Harald Gutmann <harald.gutmann@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@631 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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directly in conjunction for -r/-w/-v.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@628 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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and does not work for external flashers. Plus, it gives the user a false
sense of security in some corner cases.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@608 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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supported flash chips (and their status, size, and type), chipsets
(plus status), mainboards (plus status), and external PCI devices
usable as programmer to stdout.
This allows for very easy pasting into the http://coreboot.org/Flashrom
page, so we can keep that page up-to-date without much hassle.
The list of boards is mostly new (known good ones which don't need
write-enable code, and known-bad ones) and also lists URLs to the
vendor's mainboard pages.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@607 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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FT2232H/4232H chip from FTDI.
FTDI support is autodetected during compilation.
Paul writes:
There are certainly possible improvements: The code has hard-coded
values for which interface of the ftdi chip to use (interface B was
chosen because libftdi seems to have trouble with A right now), what
clock rate use for the SPI interface (I've been running at 30Mhz, but
the patch sets it to 10Mhz), and possibly others. I think this means
that per-programmer options might be a good idea at some point.
Carl-Daniel writes:
There is one additional FIXME comment in the code, but AFAICS that
problem is not solvable with current libftdi.
Signed-off-by: Paul Fox <pgf@laptop.org>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@598 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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this violate the principle of least surprise, it also caused one bug
where -Ewv was specified and the flash ended up being empty.
Support only one operation at a time.
As a side benefit, this allows us to clean up main() quite a bit.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@585 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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this in the last commit. Also do some random cleanups while I'm at it.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The syntax is explained in the man page.
Example: flashrom -p dummy=lpc,fwh
Tested, works perfectly. ;-)
As a nice benefit, it allows easy testing of the "probe only compatible
flashes" patch.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@559 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This is a fast way to test if a IT87xx board_enable() would work.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Tested-by: Harald Gutmann <harald.gutmann@gmx.net>
Acked-by: Harald Gutmann <harald.gutmann@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@557 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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fixes:
- Update manpage, we now report supported boards via -L.
- Add some missing escaping for '-' characters in the manpage.
- Shorten some of the really long device names, so that -L output looks
nicer.
- Display a "table header" for all entries/columns in -L output.
- Make -L output tabular for all lists for better readability.
- Do not print "unknown XXXX SPI chip" entries in -L output.
- And random other cosmetics...
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@543 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@535 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Document new 'satasii' programmer in -L output and manpage.
- Drop PCI_IO_BASE_ADDRESS, pci.h has such #defines already.
- Beautify flashrom output and make it more consistent.
- Same for the 'make' output (reordered some $CC parameters).
Build-tested on i386, shouldn't break any builds, I think.
- Some variable renaming and other cosmetic fixes.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@529 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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multiple ones, abort with a message to the user, suggesting to use the
flashrom -p nic3com=bb:dd.f
syntax. If exactly one supported NIC is found, use it. If none is found,
abort with an error.
Print the bb:dd.f numbers for all supported NICs we find, so the user
doesn't have to poke around in lspci output to find the desired bb:dd.f.
Also, drop one pci_read_long() in favor of using the already existing
base_addr[0] struct field.
Drop the BAR in user messages, it's not really useful for us. Instead,
explain the BDF syntax a bit more verbosely.
While I'm at it, update the manpage some more to mention and fully document
the external programmer support we have (or will have soon).
The patch is tested on hardware:
$ flashrom -p nic3com
flashrom v0.9.0-r512
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200, BDF 05:04.0)
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200, BDF 05:03.0)
Error: Multiple supported NICs found. Please use 'flashrom -p nic3com=bb:dd.f'
to explicitly select the card with the given BDF (PCI bus, device, function).
$ flashrom -p nic3com=05:04.0
flashrom v0.9.0-r512
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200, BDF 05:04.0)
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
No operations were specified.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@513 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This allows flashrom to identify, read, write, erase and verify flash chips
on (some) 3COM network cards. The patch uses the external programmer
infrastructure, the network card is basically treated as an external
flash programmer.
Usage:
$ ./flashrom -p nic3com
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
No operations were specified.
$ ./flashrom -p nic3com -E
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
Erasing flash chip... SUCCESS.
$ ./flashrom -p nic3com -wv backup.bin
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
Flash image seems to be a legacy BIOS. Disabling checks.
Programming page: 1023 at address: 0x0000ffc0
Verifying flash... VERIFIED.
$ ./flashrom -p nic3com -r backup.bin
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
Reading flash... done.
I have tested this on actual hardware (see PCI IDs above) and all
operations worked fine.
Support for other 3COM cards will follow (I added some more which should
be supportable by this code, but they're untested so far), as well as
support for NICs from other vendors.
The patch also adds support for the Atmel AT49BV512 which is soldered
onto the 3COM NIC I used for testing.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Mateusz Murawski <matowy@tlen.pl>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@499 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Usage:
flashrom --programmer dummy
This is a great way to test flashrom without root access.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@483 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@481 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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where it belongs (this also eliminates some duplicated contents).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@460 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@451 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@450 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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He started flashrom back in 2000.
Thanks to Ron for pointing this out.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@448 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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(all-caps or no-caps for short options, exclude range syntax, etc.) we
should tell users in the man page and the usage message about this.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@447 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Mention a few more flash chip packages in README/manpage.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@427 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Fix typo.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@426 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Various manpage / README fixes:
- Improve description a bit, especially wrt chip packages and
protocols.
- Add some missing parameters to manpage option descriptions.
- Remove long obsolete DoC support note.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@425 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Document exit() codes introduced in r3907.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@402 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The flashrom man page has incomplete author/copyright sections and an
incorrect license section.
- Remove the copyright listings and refer the reader to the source
files.
- Update the author list to those which have copyright messages in the
source files.
- Correct the license from GPL v2+ to (GPL v2, with some files under
later versions as well)
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@375 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Some flashrom documentation fixes, and removal of duplicated info (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@271 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add --list-supported option to flashrom which lists the supported
ROM chips, chipsets, and mainboards (Closes #90).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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