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* Simplify get_next_write in the partial write code.hailfinger2010-12-061-3/+1
| | | | | | | | | | Suggested by Michael Karcher. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1246 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Clean up erase function checking.hailfinger2010-12-051-24/+41
| | | | | | | | | | Update a few comments and messages to improve readability. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1244 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for the Open Graphics Project development card, OGD1, as ahailfinger2010-12-031-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | SPI flash programmer. The project is in the the process of designing and making a complete, open source, graphics card. More info at http://wiki.opengraphics.org. The first development card is a PCI add in card containing a couple of FPGAs and a couple of serial flash chips (amongst other things). The FPGAs are called XP10 and S3 (their part numbers). The XP10 contains its own flash and does not need to be programmed by flashrom - it ensures that the device can enumerate on the PCI bus without needing further configuration. The larger FPGA is the S3. This is configured from a large SPI flash (2 MBytes). The second SPI flash is used to store the VGA BIOS. It is smaller (128 KBytes). This patch adds support for programming either of the two SPI flash chips. The programmer device takes one configuration option which selects which of the two flash chips is accessed. This must be set to either "cprom" or "bprom". (The project refers to the two chips as "cprom" / "bprom", "s3" and "bios" are more readable alternatives). Add support for SST SST25VF010 (REMS). Mark SST SST25VF016B as tested for write. Signed-off-by: Mark Marshall <mark.marshall@csr.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1241 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Avoid printing the chip locks if chip detection was forced because lockhailfinger2010-12-021-2/+6
| | | | | | | | | | access may involve flash chip registers which will not be mapped. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1240 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Handle erase failure in partial write.hailfinger2010-12-021-4/+13
| | | | | | | | Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1238 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Read the to-be-verified area in one go.hailfinger2010-11-161-33/+17
| | | | | | | | | | | | | | | | | verify_range() and check_erased_range() check each page separately. While that may have seemed like a good idea back when the code was introduced, it has no benefits for any of the chips where we support write because all of them handle cross-page reads nicely. The only class of chips where this change could be a problem is chips with non power of two sector sizes which have gaps in the address space. We simply require their read functions to provide gap-free results and leave it at that. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-By: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1233 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Revert PCI config space writes on shutdown.hailfinger2010-11-101-1/+1
| | | | | | | | | | | | | | | | This means all chipset enables etc. will be undone on shutdown. Reversible PCI config space writes now use rpci_write_*(). PCI config space writes which are one-shot (e.g. communication via config space) should continue to use the permanent pci_write_* variants. Extend the number of available register_shutdown slots to 32. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Support setting the Dediprog SF100 SPI voltage.hailfinger2010-11-091-0/+7
| | | | | | | | | | | | Add a generic voltage parameter parser. Move tolower_string() from dummyflasher.c to flashrom.c to make it available everywhere. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1226 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Avoid two memory leaks in doit() which were unproblematic for flashromhailfinger2010-11-051-81/+63
| | | | | | | | | | | | | | | | | | because flashrom terminates after finishing doit(). Rename oldcontents to curconents in erase_and_write_block_helper(). Unify the code for all granularities in get_next_write(). Return write length from get_next_write() instead of filling it as referenced parameter. Thanks to Michael Karcher for pointing out the first two issues. Thanks to David Hendricks for pointing out the third issue and suggesting a way to unify that code. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1225 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* This patch makes flashrom use real partial writes. If you write an imagehailfinger2010-11-041-40/+204
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | full of 0xff, flashrom will erase and detect that no write is needed. If you write an image which differs only in some parts from the current flash contents, flashrom will detect that and not touch unchanged areas. Fix a long-standing bug in need_erase() for 256 byte granularity as well. Nice side benefit: Detailed progress printing. S means skipped E means erased W means written Thanks to Andrew Morgan for testing countless iterations of this patch. Thanks to Richard A. Smith for testing on Dediprog SF100. Thanks to David Hendricks for the review and for creating a partial write torture test script and testing with it on Intel NM10 and AMD SB700 SPI. Thanks to Idwer Vollering for testing with Intel SPI NICs. Thanks to Rudolf Marek for testing on AMD SB710 and SiI SATA controllers. Thanks to Michael Karcher for the review. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: David Hendricks <dhendrix@google.com> Acked-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1224 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Always read the flash chip before writing. This will allow flashrom tohailfinger2010-10-191-11/+66
| | | | | | | | | | | | | | | | | | | | | | skip erase of already-erased blocks and to skip write of blocks which already have the wanted contents. Avoid emergency messages by checking if the chip contents after a failed write operation (erase/write) are unchanged. Keep the emergency messages after a failed pure erase. That part is debatable because if someone wants erase, he pretty sure doesn't care about the flash contents anymore. Please note that this introduces additional overhead of a full chip read before write. This is frowned upon by people with slow programmers. A followup patch will make this configurable. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coreboot.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1215 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* doit() is the monster function we split off from main() when we createdhailfinger2010-10-151-81/+100
| | | | | | | | | | | | | cli_classic() and tried to introduce some abstraction. doit() is a poster child of WTFs on an astronomic scale. Make doit() less bad by factoring out self-contained code. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1212 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Switch all flash chips to partial write.hailfinger2010-10-131-1/+1
| | | | | | | | | | | | | | | | The inner write functions which handle partial write are renamed to the original name of their wrappers. The write wrappers are removed. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com> Tested-by: Andrew Morgan <ziltro@ziltro.com> Tested-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Idwer Vollering <vidwer@gmail.com> Tested-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Sean Nelson <audiohacked@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1211 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* flashrom had an implicit erase-on-write for most flash chip andhailfinger2010-10-081-9/+17
| | | | | | | | | | | | | | | | | programmer drivers, but it was not entirely consistent. Some drivers had their own hand-rolled partial update functionality which made handling partial updates from generic code impossible. Move implicit erase out of chip drivers, and kill some dead erase functions at the same time. A full chip erase is now performed in the generic code for all flash chips on write, and after that the whole chip is written. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1206 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* A lot of messages sent to flashrom@flashrom.org just have "flashrom -V"hailfinger2010-10-081-3/+4
| | | | | | | | | | | | as the subject. Ask people to include more information in the subject line to make life easier for developers/supporters. Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1202 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* flashrom -L output did not contain a list of programmers nor were allhailfinger2010-10-061-0/+41
| | | | | | | | | | | | programmers listed. Fix it and mention at least the name of each programmer. Wiki output is unchanged, and will need separate fixups. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for building flashrom against libpayload.oxygene2010-09-301-1/+3
| | | | | | | | | | | | This doesn't include changes to the frontend which must be done separately, so this won't work out of the box. This code was tested on hardware. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1184 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add Intel Gigabit NIC SPI flashing support.uwe2010-09-031-1/+23
| | | | | | | | | | | | | | | | | | | | | | Tested on a 82541PI (0x8086, 0x107c) using 32-bit hardware. The last line in nicintel_request_spibus() could be changed so that FL_BUSY is used instead. Shortened sample log: [...] Found "Intel 82541PI Gigabit Ethernet Controller" (8086:107c, BDF 01:03.0). Found chip "ST M25P10.RES" (128 KB, SPI) at physical address 0xfffe0000. Multiple flash chips were detected: M25P05.RES M25P10.RES Please specify which chip to use with the -c <chipname> option. [...] Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various cosmetic and coding-style fixes (trivial).uwe2010-08-081-3/+3
| | | | | | | | | | | | | | | | | | | | | | | - Fix incorrect whitespace, indentation, and coding style in some places. - Drop '/**' Doxygen comments, we don't use Doxygen. Even if we would use it, the comments are useless as we don't have any Doxygen markup in there. - Use consistent vendor name spelling as per current website (NVIDIA, abit, GIGABYTE). - Use consistent / common format for "Suited for:" lines in board_enable.c. - Add some missing 'void's in functions taking no arguments. - Add missing fullstops in sentences, remove them from non-sentences (lists). Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1134 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Split off programmer.h from flash.h.hailfinger2010-07-271-0/+1
| | | | | | | | | | | | | | | | | | | | | | Programmer specific functions are of absolutely no interest to any file except those dealing with programmer specific actions (special SPI commands and the generic core). The new header structure is as follows (and yes, improvements are possible): flashchips.h flash chip IDs chipdrivers.h chip-specific read/write/... functions flash.h common header for all stuff that doesn't fit elsewhere hwaccess.h hardware access functions programmer.h programmer specific functions coreboot_tables.h header from coreboot, internal programmer only spi.h SPI command definitions Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add support for RayeR SPIPGM hardware as described inhailfinger2010-07-211-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | http://rayer.ic.cz/elektro/spipgm.htm To use the RayeR driver, run flashrom -p rayer_spi -V Known bugs/limitations: - Won't compile/work on non-x86 architectures. - Will always use direct port I/O access. Log follows: flashrom v0.9.2-r1039 on MS-DOS 7 (i686), built with libpci 3.1.5, GCC 4.3.2, little endian Calibrating delay loop... OK. Initializing rayer_bitbang_spi programmer Using port 0x378 as I/O base for parallel port access. ... Probing for Macronix MX25L1605, 2048 KB: probe_spi_rdid_generic: id1 0xc2, id2 0x2015 ... Found chip "Macronix MX25L1605" (2048 KB, SPI) at physical address 0xffe00000. ... No operations were specified. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Martin Rehak <rayer@seznam.cz> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Use struct pointer instead of enum to set bitbang adaptermkarcher2010-07-171-6/+0
| | | | | | | Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1091 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Newer llvm/clang versions (since r102686) have a __clang_version__ macrohailfinger2010-07-171-1/+6
| | | | | | | | | | | | | | which can be used to print the exact clang version. Fix a case where chip_to_probe was referenced twice via extern, once at the function level and once in a global include file. Found by latest clang. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1087 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Print an error message on read errors and abort instead of proceedinghailfinger2010-07-131-17/+44
| | | | | | | | | | | | | | | | | | | | anyway. Improve error checking in file write, chip read and chip verify. Refactor the read routines a bit to split reading from file writing. Log for a failed read: [...] Found chip "Winbond W25x16" (2048 KB, SPI) at physical address 0xffe00000. Reading flash... Invalid OPCODE 0x03 Read operation failed! FAILED. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-By: Stephen Kou <stephen@hyarros.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1079 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Wrap a line which was 156 columns wide.hailfinger2010-07-131-1/+4
| | | | | | | | Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1078 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Split erase region walking out of erase_flash.hailfinger2010-07-131-21/+24
| | | | | | | | | | | That allows us to use erase region walking for a combined erase/write action, and is a prerequisite for partial flashing, Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1077 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Make programmer_param static by converting all users tohailfinger2010-07-081-1/+6
| | | | | | | | | | | | extract_programmer_param. Programmer parameters can no longer be separated with a colon, they have to be separated with a comma. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1072 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various places in the flashrom source feature custom parameterhailfinger2010-07-061-35/+42
| | | | | | | | | | | | | | | | | | | | extraction from programmer_param. This led to wildly differing syntax for programmer parameters, and it also voids pretty much every assumption you could make about programmer_param. The latter is a problem for libflashrom. Use extract_param everywhere, clean up related code and make it more foolproof. Add two instances of exit(1) where we have no option to return an error. Remove six instances of exit(1) where returning an error was possible. WARNING: This changes programmer parameter syntax for a few programmers! Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* If a programmer has untested or non-working write/erase code, buthailfinger2010-07-031-0/+20
| | | | | | | | | | | | | probing/reading works, it makes sense to protect the user against write/erase accidents. This feature will be used by the Nvidia MCP SPI code, and it also might make sense for the gfxnvidia driver which has non-working write/erase. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1069 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Kill global variables, constants and functions if local scope suffices.hailfinger2010-07-031-21/+44
| | | | | | | | | | | | | | | | | | | | | | | | Constify variables where possible. Initialize programmer-related variables explicitly in programmer_init to allow running programmer_init from a clean state after programmer_shutdown. Prohibit registering programmer shutdown functions before init or after shutdown. Kill some dead code. Rename global variables with namespace-polluting names. Use a previously unused locking helper function in sst49lfxxxc.c. This is needed for libflashrom. Effects on the binary size of flashrom are minimal (300 bytes shrinkage), but the data section shrinks by 4384 bytes, and that's a good thing if flashrom is operating in constrained envionments. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* National Semiconductor DP83815/DP83816 and DP83820 NIC programmerhailfinger2010-06-071-1/+22
| | | | | | | | | | | | support. Some instability remains, but that may be due to hardware problems in the specific card (Netgear FA311) used for testing. Signed-off-by: Andrew Morgan <ziltro@ziltro.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1039 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* gcc and clang can check format strings of printf-like functions. Sincehailfinger2010-06-041-1/+1
| | | | | | | | | | | | | we don't support any other compilers right now, enable that extension unconditionally. Fix the bugs found by format string checking. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1032 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* So far, we have up to 4 different names for the same thing (ignoringhailfinger2010-05-311-33/+33
| | | | | | | | | | | | | | | | | | | | | | capitalization): CONFIG_FT2232SPI (makefile config option) FT2232_SPI_SUPPORT (#define) ft2232spi (programmer name) ft2232_spi.c (programmer file) Use CONFIG_* with underscores for makefile config options and #defines and kill the useless _SUPPORT idiom. Use lowercase names with underscores for programmer names and programmer files. With this, you can run "grep -i ft2232_spi" and find everything related to the ft2232_spi driver. Same applies to all other programmers. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Remove unneeded #include statements completely.hailfinger2010-05-301-0/+1
| | | | | | | | | | | | | | | | unistd.h was only used to get a definition of NULL in all files. Add our own NULL #define and remove unistd.h from flash.h stdio.h has no place in flash.h, it should be included only in files which really need it. Add #include statements in individual .c files where needed. Replace a few printf with msg_* to eliminate the need for stdio.h. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1021 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Handle the following architectures in generic flashrom code:hailfinger2010-05-261-4/+11
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - x86/x86_64 (little endian) - PowerPC (big endian) - MIPS (big+little endian) No changes to programmer specific code. This means any drivers with MMIO access will _not_ suddenly start working on big endian systems, but with this patch everything is in place to fix them. Compilation should work on all architectures listed above for all drivers except nic3com and nicrealtek which require PCI Port IO which is x86-only for now. To compile without nic3com and nicrealtek, run make distclean make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no Thanks to Misha Manulis for testing early versions of this patch on PowerPC (big endian) with the satasii programmer. Thanks to Segher Boessenkool for design review and for helping out with compiler tricks and pointing out that we need eieio on PowerPC. Thanks to Vladimir Serbinenko for compile testing on MIPS (little endian) and PowerPC (big endian) and for runtime testing on MIPS (little endian). Thanks to David Daney for compile testing on MIPS (big endian). Thanks to Uwe Hermann for compile and runtime testing on x86_64. DO NOT RUN FLASHROM ON NON-X86 AFTER APPLYING THIS PATCH! This patch only provides the infrastructure, but does not convert any drivers, so flashrom will compile, but it won't do the right thing on non-x86 platforms. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Misha Manulis <misha@manulis.com> Acked-by: Vladimir 'phcoder/φ-coder' Serbinenko <phcoder@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Segher Boessenkool <segher@kernel.crashing.org> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Support for Realtek RTL8139 network card flashing.hailfinger2010-05-211-1/+41
| | | | | | | | Signed-off-by: Joerg Fischer <turboj@gmx.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1002 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Fix assorted documentation, frontend and printing bugs.hailfinger2010-05-151-10/+25
| | | | | | | | | | | Change the command line interface to make file names positional. Add more sanity checks to the command line parser. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@998 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* convert programmer print messages to msg_p*snelson2010-05-071-71/+71
| | | | | | | | | | | | convert general print messages to msg_g* a few fixes as suggested by Carl-Daniel Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* --force may have been a good idea back when only developers were usinghailfinger2010-04-281-1/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | flashrom, but over the last few months we've seen too many people who incorrectly believed that --force would solve anything. One of the problems is that --force had multiple meanings: - Force chip read by faking probe success. - Force chip access even if the chip is bigger than max decode size for the flash bus. - Force erase even if erase is known bad. - Force write even if write is known bad. - Force writing even if cbtable tells us that this is the wrong image for this board. This patch cleans up --force usage: - Remove any suggestions to use --force for probe/read from flashrom output. - Don't talk about "success" or "Found chip" if the chip is forced. - Add a new internal programmer parameter boardmismatch=force. This overrides any mismatch detection from cbtable/image comparisons. - Add a new internal programmer parameter laptop=force_I_want_a_brick. - Adjust the documentation for --force. - Clean up the man page a bit whereever it talks about --force or laptops. Additional changes in this patch: - Add warnings about laptops to the documentation. - Abort if a laptop is detected. Can be overridden with the programmer parameter mentioned above. - Add "Portable" to the list of DMI strings indicating laptops. - Check if a chip specified with -c is known to flashrom. - Programmer parameter reliability and consistency fixes. - More paranoid self-checks. - Improve documentation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@996 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add runtime and build environment info to the flashrom version message.hailfinger2010-03-271-1/+39
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch uses code from Idwer Vollering and Maciej Pijanka. I've added Makefile support and compiler version printing and restructured the code heavily. The code prints runtime system information and buildtime libpci information (I couldn't find any runtime libpci version function). Due to our ability to cross-compile flashrom, buildtime system information from "uname -mrs" doesn't help diagnosing any problems. That's why only libpci and gcc are buildtime info, and the rest is runtime info. Examples: openSUSE 10.3, i686, gcc 4.2.1, with PCI support: flashrom v0.9.1-r971 on Linux 2.6.22.19-0.2-default (i686), built with libpci 2.2.6, GCC 4.2.1 (SUSE Linux) openSUSE 10.3, i686, llvm-clang-2.6.99svn97231, with PCI support: flashrom v0.9.1-r971 on Linux 2.6.22.19-0.2-default (i686), built with libpci 2.2.6, LLVM 1/clang 1 openSUSE 11.1, x86_64, gcc 4.3.2, with PCI support: flashrom v0.9.1-r972 on Linux 2.6.27.29-0.1-default (x86_64), built with libpci 3.0.1, GCC 4.3.2 [gcc-4_3-branch revision 141291] openSUSE 10.3, i686, gcc 4.2.1, without PCI support: flashrom v0.9.1-r971 on Linux 2.6.22.19-0.2-default (i686), built with GCC 4.2.1 (SUSE Linux) Windows/cygwin, i686, gcc 4.3.4, without PCI support: flashrom v0.9.1-r973 on CYGWIN_NT-5.1 1.7.1(0.218/5/3) (i686), built with GCC 4.3.4 20090804 (release) 1 FreeBSD 8.0, i386, gcc 4.2.1, with PCI support: flashrom v0.9.1-r973 on FreeBSD 8.0-RELEASE-p2 (i386), built with libpci 3.1.7, GCC 4.2.1 20070719 [FreeBSD] Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Idwer Vollering <vidwer@gmail.com> Acked-by: Maciej Pijanka <maciej.pijanka@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@987 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Reduce message severity level for skipped chips.hailfinger2010-03-221-4/+8
| | | | | | | | | | | | | | | | | | | Old verbose log excerpt: Probing for Atmel AT25DF021, 256 KB: skipped. Host bus type Parallel and chip bus type SPI are incompatible. New verbose log excerpt: Probing for Atmel AT25DF021, 256 KB: skipped. This makes logs more readable and manageable. If someone really desperately wants all the bus debugging stuff, he/she can switch to SPEW mode instead of VERBOSE mode. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-By: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@970 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Various coding style and cosmetic changes (trivial).uwe2010-03-131-3/+4
| | | | | | | | | | | | | | | - Fix coding-style, whitespace, and indentation in a few places. - Consistently use the same spelling ("Super I/O") everywhere. - Make some flashrom stdout output look a bit nicer. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@933 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Write granularity is chip specific. The following writehailfinger2010-03-081-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | granularities exist according to my datasheet survey: - 1 bit. Each bit can be cleared individually. - 1 byte. A byte can be written once. Further writes to an already written byte cause the contents to be either undefined or to stay unchanged. - 128 bytes. If less than 128 bytes are written, the rest will be erased. Each write to a 128-byte region will trigger an automatic erase before anything is written. Very uncommon behaviour. - 256 bytes. If less than 256 bytes are written, the contents of the unwritten bytes are undefined. Note that chips with default 256-byte writes, which keep the original contents for unwritten bytes, have a granularity of 1 byte. Handle 1-bit, 1-byte and 256-byte write granularity. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com> Acked-by: David Hendricks <dhendrix@google.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@927 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add initial (non-working) code for Highpoint ATA/RAID controllers.uwe2010-02-211-1/+23
| | | | | | | | | | | | It's disabled by default. The current status is detailed at: http://www.flashrom.org/pipermail/flashrom/2010-January/001828.html Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@908 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Here's a very quick patch to fix the missing unlock code.snelson2010-02-191-0/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | Fixes missing unlock for certain chips: * unlock_49lf00x * Pm49fl002 * Pm49fl004 * unlock_49flxxxc * SST49LF160C * unlock_winbond_fwhub * W39V080FA * W39V080FA (dual mode) Fixes missing printlock for certain chip: * printlock_w39v040c * W39V040C Signed-off-by: Sean Nelson <audiohacked@gmail.com> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@907 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Some programmers want to run certain functions during programmerhailfinger2010-02-141-0/+33
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | shutdown, but the function choice depends on the code path taken during programmer init. Rather than rebuilding the whole init logic in the shutdown function, it is now possible to register functions for execution on programmer shutdown. The behaviour is similar to atexit(), but the registered functions will be run on programmer shutdown instead of on exit and the functions will be called with a void * argument that is specified on registration. Registered functions must have the prototype void function(void *); and will be executed in reverse registration order directly before calling the programmer-specific shutdown() function. It is recommended to have shutdown() only disable programmer/hardware access and leave all code path sensitive shutdown to functions registered with register_shutdown(). The most prominent use case is resetting the EC after flashing on laptops. Note: There are quite a few code paths in flashrom which proceed to terminate flashrom without any programmer shutdown. Those code paths will not get the benefit of register_shutdown() and they should be changed wherever possible. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@904 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* At long last, the day has come, and we can bury full-chip erase once andhailfinger2010-02-111-6/+0
| | | | | | | | | | | | | | | | for all. Back in November 2008(!) I proposed the first version of the flexible sector-based erase structure, and now we can finally rip out the old full-chip erase code without ill effects. Rejoice and party! Thanks to everyone who made this possible, especially to Sean Nelson who converted the majority of flash chips to sector erase. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@895 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Open binary files in binary mode. No change on UNIX (or Mac OS,oxygene2010-01-251-2/+2
| | | | | | | | | | according to its documentation), but fixes operation on Windows. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Dediprog SF100 support.hailfinger2010-01-191-1/+23
| | | | | | | | | | | | | | | | | | | | | | | | Reverse engineered from USB logs. I never touched that programmer nor did I ever see the associated software. Disabled by default until it is complete. The driver needs to be hooked up to the SPI core before it will do anything besides init and diagnostics. I successfully reverse engineered all commands, but some are still somewhat magic. Logs from "flashrom -p dediprog -V" are appreciated. Probe and read should work, erase/write is expected to explode. The programmer will set voltage to 0 on exit. Thanks a lot to Stefan Reinauer and Patrick Georgi for providing USB logs and for testing the result. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@870 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
* Add eraseblock functions to self-check. It doesn't make sense to havehailfinger2010-01-191-9/+28
| | | | | | | | | | | | different layouts for the same function on one chip. Keep going if an error is found, we want all errors to be reported in one fell swoop. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Sean Nelson <audiohacked@gmail.com> git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@869 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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