| Commit message (Collapse) | Author | Age | Files | Lines |
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notation, in case there are multiple NICs in one system.
Usage: flashrom -p nic3com=bb:ss.f
Signed-off-by: Christian Ruppert <spooky85@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@510 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This allows flashrom to identify, read, write, erase and verify flash chips
on (some) 3COM network cards. The patch uses the external programmer
infrastructure, the network card is basically treated as an external
flash programmer.
Usage:
$ ./flashrom -p nic3com
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
No operations were specified.
$ ./flashrom -p nic3com -E
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
Erasing flash chip... SUCCESS.
$ ./flashrom -p nic3com -wv backup.bin
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
Flash image seems to be a legacy BIOS. Disabling checks.
Programming page: 1023 at address: 0x0000ffc0
Verifying flash... VERIFIED.
$ ./flashrom -p nic3com -r backup.bin
flashrom v0.9.0-r498
Found NIC "3COM 3C905C: EtherLink 10/100 PCI (TX)" (10b7:9200), addr = 0xa400
Calibrating delay loop... OK.
Found chip "Atmel AT49BV512" (64 KB) at physical address 0xffff0000.
Reading flash... done.
I have tested this on actual hardware (see PCI IDs above) and all
operations worked fine.
Support for other 3COM cards will follow (I added some more which should
be supportable by this code, but they're untested so far), as well as
support for NICs from other vendors.
The patch also adds support for the Atmel AT49BV512 which is soldered
onto the 3COM NIC I used for testing.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Mateusz Murawski <matowy@tlen.pl>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@499 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Print the return value of dummy_chip_read[bwl].
Align entries in programmer_table.
This is a cosmetic patch and has no effect on code flow.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@495 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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even the dummy flasher caused memory mappings to be set up.
Add map/unmap functions to the external flasher abstraction.
Fix a possible scribble-over-low-memory corner case which fortunately
never triggered so far.
With this patch, --programmer dummy works fine as non-root.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@493 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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and abort any writes to locked sectors.
Verbose mode gives you all the info. Normal mode only tells you of
unlocking failed, but gives enough details to debug.
Add a comment about flash register placement to flashrom.c.
Thanks to Uwe for testing multiple iterations of this patch.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@492 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@489 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashbase is a variable which should never be set outside chipset code.
It is only used to calculate the base address of the flash space at
exactly one location in the code.
Setting flashbase during probe caused subsequent probes to fail unless
special handling code was used. We had such code and it caused every
probe except the first to fail on Elan SC520.
Remove the superfluous flashbase assignment and simplify the rest of the
code.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ronald G. Minnich <rminnich@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@488 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Usage:
flashrom --programmer dummy
This is a great way to test flashrom without root access.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@483 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@481 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Read/write accesses through function pointers
- Command line parameter for internal/external flasher
- Board and chipset setup moved to internal init function
- Shutdown stuff moved to internal shutdown function
As a side benefit, this will allow us to undo chipset write enable
during shutdown.
Tested by Uwe on real hardware.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@476 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@475 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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no read function is defined. This special case is handled in lots of
places all over the code.
Remove the special case and use the read_memmapped function. Not only
does this allow us to fix a read bug in flashrom I recently uncovered on
ICH SPI, it also allows us to add support for Paraflasher to flashrom.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@473 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Suggested by Peter Stuge.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@471 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@454 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Solaris, Darwin/Mac OS X and DragonFly BSD.
Thanks to Joerg Schilling and Patrick Georgi for the Solaris part.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@452 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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(all-caps or no-caps for short options, exclude range syntax, etc.) we
should tell users in the man page and the usage message about this.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@447 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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DragonFly, but this helps a lot.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@445 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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MAX may already be defined. Also, fix smaller cosmetics (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@442 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Fix broken flash chip base address logic
Elan SC520 requries us to deal with flash chip base addresses at locations
other than top of 4GB. The logic for that was incorrectly triggered also when
a board had more than one flash chip. This patch will honor flashbase only when
probing for the first flash chip on the board, and look at top of 4GB for later
chips.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Myles Watson <mylesgw@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@415 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Factor out read and erase functions from flashrom main().
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@412 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Abstract mmap() in physmap.c and only open /dev/mem on the first physmap() call.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@397 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Change flashrom.c:map_flash_registers() from int to void.
The function exit()s on failure, and no callers check the return value.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@396 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Fix stupid off-by-one error in erase verification.
As reported by Jody McIntyre. Thanks!
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@389 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Check all mmap() calls and print helpful Linux error message.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@386 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Provide some hints for the user in case /dev/mem mmap fails.
resolves #121
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@385 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Always print address when verification fails, not only with -V.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@381 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Check return value of fscanf()/fwrite()/fread()
Fix build error on distros with warn_unused_result attributes in glibc.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Yul Rottmann <yulrottmann@bitel.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@378 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Display test status in -L chip listing
Looks like this:
Supported flash chips: Tested OK operations: Known BAD operations:
AMD Am29F002(N)BB
AMD Am29F002(N)BT PROBE READ ERASE WRITE
AMD Am29F016D
AMD Am29F040B PROBE READ ERASE WRITE
AMD Am29LV040B
Atmel AT45CS1282 READ
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@362 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Fix compilation of r3797 with gcc-4.3.2
Thanks to Niels Ole Salscheider for the problem report.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@360 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Check if erase succeeds and exit with error on failure.
flashrom used to exit 0 even if erase failed. Not anymore.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@359 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: gcc thinks base could be used uninitialized, so shut it up.
Bug from r3791.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@357 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Fix bug in r3790
If flashbase was set before probe_flash() it would only ever be used once, for
the very first flash chip probe.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@356 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Replace #ifdefs for sc520 systems by run time probing.
fixes #109
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@355 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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If a chip has any TEST_BAD_* flag set, we don't even list the
unsupported functions, giving the user the impression that the
unsupported functions are tested.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@352 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add support for the AMD/ATI SB600 southbridge SPI functionality.
This has been tested by Uwe Hermann on an RS690/SB600 board.
Signed-off-by: Jason Wang <Qingpei.Wang@amd.com>
Reviewed-by: Joe Bao <zheng.bao@amd.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@351 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Coding-style fixes for flashrom, partly indent-aided (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@326 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Check that a filename was specified also when using force read
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@322 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Only find "unknown .. SPI chip" if no other chip was found
This removes the false positive matches we've been seeing, and also removes
the true positive match in case there is more than one flash chip and the 2nd
or 3rd are unknown - but I think that case is uncommon enough to warrant the
improvement in the common case. Use flashrom -frc forced read if you have the
uncommon case, and/or please add the flash chip to the flashchips array.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@313 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Fix error -EINVAL on mmap()
Don't calculate "flash_baseaddr" until the final value of "size"
is known, otherwise we end up trying to map a page right after
the end of memory.
Fixes #112.
Signed-off-by: Segher Boessenkool <segher@kernel.crashing.org>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@308 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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update copyright year (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@306 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: probe_flash() cleanup for better code readability
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@291 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Use symbolic constants for PCI subsystem probing in flashrom.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@279 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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* ICH7 SPI support
* fix some variable names in ichspi.c (Offset -> offset)
* Dump ICH7 SPI bar with -V
* Improve error message in case IOPL goes wrong. (It might not even be an IOPL)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@278 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Show expected and read byte on verify failure. Trivial.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Peter Stuge <peter@stuge.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@261 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Force read unknown flash chips
When flash chip detection fails, it is still useful and possible to read the
flash chip contents. If no flash chip is found in normal probes and the
-f -r -c CHIPNAME options are given, a successful probe for the specified
chip is forced, and then flashrom reads the flash chip using either the read
function for the specified chip, or if there is none, a simple memcpy().
The patch also moves the global variable int force in flashrom.c into main()
and passes it as a parameter to layout.c:show_id(), which was the only other
function that used the variable. This is needed to avoid confusion with the
new parameter int force which is added to flashrom.c:probe_flash() and used
to force probe success for the chip named in char *chip_to_probe.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@259 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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A bunch of cosmetic improvements (trivial).
- Fix typos and inconsistencies.
- Drop duplicate line which tells us the chip name twice.
- Also print the chip vendor, not only the name.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@249 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Changes to make flashrom compile (and work) on FreeBSD.
This patch addresses different argument order of outX() calls,
FreeBSD-specific headers, difference in certain type names and system
interface names, and also FreeBSD-specific way of gaining IO port
access.
Signed-off-by: Andriy Gapon <avg@icyb.net.ua>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@245 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add more infrastructure for flashrom ICH9 support.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@234 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Probe for up to 3 flash chips.
Currently there is an ongoing technology migration from LPC/FWH to SPI chips.
For this reason some boards have multiple chips of different technologies
onboard. This patch makes flashrom probe for up to 3 chips and if more than
one chip is found flashrom exits, asking the user to specify -c.
[root@localhost src]# ./flashrom
...
Multiple flash chips were detected: SST49LF008A M25P16@ICH9
Please specify which chip to use with the -c <chipname> option.
[root@localhost src]#
Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com>
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Claus Gindhart <claus.gindhart@kontron.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@222 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Add a tested bitmap field to the flash chip table.
Two bits indicate OK and BAD for each operation PROBE READ ERASE WRITE.
8 bits out of 32 are in use now. No bits set means nothing has been tested.
For chips with at least one operation that is not tested or not working, the
user is asked to email a report to a special email adress so that the table
can be updated.
All chips are TEST_UNTESTED for now.
Signed-off-by: Peter Stuge <peter@stuge.se>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@221 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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