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* There are various reasons why a SPI command can fail. Among others, Ihailfinger2009-05-131-1/+1
* Trim default ICH SPI delay from 1000 to 10 microseconds. Since manyhailfinger2009-05-091-4/+4
* Chips like the SST SST25VF080B can only handle single byte writeshailfinger2009-05-091-1/+1
* Original v2 revision: 4117uwe2009-04-151-7/+5
* Original v2 revision: 3918stuge2009-01-261-1/+0
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* Original v2 revision: 3814stuge2008-12-151-27/+30
* Original v2 revision: 3805stepan2008-12-081-0/+134
* Original v2 revision: 3758hailfinger2008-11-181-9/+5
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* Original v2 revision: 3721stepan2008-11-021-15/+45
* Original v2 revision: 3669uwe2008-10-181-12/+12
* Original v2 revision: 3417stuge2008-07-071-3/+3
* Original v2 revision: 3401stepan2008-06-301-53/+54
* Original v2 revision: 3398ruik2008-06-301-26/+44
* Original v2 revision: 3397hailfinger2008-06-291-1/+2
* Original v2 revision: 3395stuge2008-06-291-1/+1
* Original v2 revision: 3393stepan2008-06-271-41/+211
* Original v2 revision: 3392stepan2008-06-271-48/+40
* Original v2 revision: 3325hailfinger2008-05-161-0/+468