| Commit message (Collapse) | Author | Age | Files | Lines |
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capitalization):
CONFIG_FT2232SPI (makefile config option)
FT2232_SPI_SUPPORT (#define)
ft2232spi (programmer name)
ft2232_spi.c (programmer file)
Use CONFIG_* with underscores for makefile config options and #defines
and kill the useless _SUPPORT idiom.
Use lowercase names with underscores for programmer names and programmer
files.
With this, you can run "grep -i ft2232_spi" and find everything related
to the ft2232_spi driver. Same applies to all other programmers.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1023 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- x86/x86_64 (little endian)
- PowerPC (big endian)
- MIPS (big+little endian)
No changes to programmer specific code. This means any drivers with MMIO
access will _not_ suddenly start working on big endian systems, but with
this patch everything is in place to fix them.
Compilation should work on all architectures listed above for all
drivers except nic3com and nicrealtek which require PCI Port IO which is
x86-only for now.
To compile without nic3com and nicrealtek, run
make distclean
make CONFIG_NIC3COM=no CONFIG_NICREALTEK=no
Thanks to Misha Manulis for testing early versions of this patch on
PowerPC (big endian) with the satasii programmer.
Thanks to Segher Boessenkool for design review and for helping out with
compiler tricks and pointing out that we need eieio on PowerPC.
Thanks to Vladimir Serbinenko for compile testing on MIPS (little
endian) and PowerPC (big endian) and for runtime testing on MIPS (little
endian).
Thanks to David Daney for compile testing on MIPS (big endian).
Thanks to Uwe Hermann for compile and runtime testing on x86_64.
DO NOT RUN FLASHROM ON NON-X86 AFTER APPLYING THIS PATCH!
This patch only provides the infrastructure, but does not convert any
drivers, so flashrom will compile, but it won't do the right thing on
non-x86 platforms.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Misha Manulis <misha@manulis.com>
Acked-by: Vladimir 'phcoder/φ-coder' Serbinenko <phcoder@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Segher Boessenkool <segher@kernel.crashing.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom, but over the last few months we've seen too many people who
incorrectly believed that --force would solve anything.
One of the problems is that --force had multiple meanings:
- Force chip read by faking probe success.
- Force chip access even if the chip is bigger than max decode size for
the flash bus.
- Force erase even if erase is known bad.
- Force write even if write is known bad.
- Force writing even if cbtable tells us that this is the wrong image
for this board.
This patch cleans up --force usage:
- Remove any suggestions to use --force for probe/read from flashrom
output.
- Don't talk about "success" or "Found chip" if the chip is forced.
- Add a new internal programmer parameter boardmismatch=force. This
overrides any mismatch detection from cbtable/image comparisons.
- Add a new internal programmer parameter laptop=force_I_want_a_brick.
- Adjust the documentation for --force.
- Clean up the man page a bit whereever it talks about --force or
laptops.
Additional changes in this patch:
- Add warnings about laptops to the documentation.
- Abort if a laptop is detected. Can be overridden with the programmer
parameter mentioned above.
- Add "Portable" to the list of DMI strings indicating laptops.
- Check if a chip specified with -c is known to flashrom.
- Programmer parameter reliability and consistency fixes.
- More paranoid self-checks.
- Improve documentation.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@996 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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for a board enable.
Move boards which had an IT87* SPI board enable from the board enable
list to the OK list.
Mark the Gigabyte GA-MA78GPM-DS2H as OK.
Change the it87spi forced port parameter to it87spiport=...
Fix incorrect indentation in the man page.
Tested by Ward Vandewege on both variants of the Gigabyte GA-M57SLI-S4
http://www.flashrom.org/pipermail/flashrom/2010-March/002712.html
Tested by 李彥學 (Ian-Xue Li) on the Gigabyte GA-MA78GPM-DS2H
http://www.flashrom.org/pipermail/flashrom/2010-March/002723.html
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Ward Vandewege <ward@gnu.org>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@983 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Fix coding-style, whitespace, and indentation in a few places.
- Consistently use the same spelling ("Super I/O") everywhere.
- Make some flashrom stdout output look a bit nicer.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@933 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The message printing code greatly exceed the 80 character limit. I can
reformat it on request to obey the limit.
Intended behaviour:
on untested boards an explanation of that status is printed and the board
enable code is not run, unless the option "boardenable=force" has been
passed to the internal programmer.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@916 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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only need hardware (ioport, memory) access.
Split internal.c into internal.c and hwaccess.c.
Note: This patch was created by "svn cp internal.c hwaccess.c" and then
removing stuff from both files. That's why you can't apply the patch
as-is before running the svn cp.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@898 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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If a board is not uniquely identifiable by PCI device/subsystem IDs, a
string can be specified to be looked for (case-sensitive, substring or
anchored) for now in one of the following DMI items in addition to matching
the PCI IDs:
- System Manufacturer
- System Product Name
- System Version
- Baseboard Manufacturer
- Baseboard Product Name
- Baseboard Version
Strings are anchored re-like (^ at the beginning, $ at the end), but
there are no plans to support full regular expressions and matched to any
of the mentioned fields.
The match is only made if DMI info is available and the string matches.
If no DMI info is available and the PCI IDs match, a warning is printed
as the board can not be autodetected.
It's still open to discussion whether we add an DMI override switch to
specify a string that will definitely match, and whether this switch is
only used if no DMI is available or whether it overrides or augments DMI
data.
DMI data is currently read using dmidecode. This tool is available for
all major platforms except MacOS X. I heard that there also is a MacOS X
version of dmidecode, but didn't investigate that.
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@874 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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those functions lived inside internal.c and were unavailable if no
PCI-based programmers were compiled in. Move those functions to the new
file programmer.c.
Thanks to Patrick Georgi for finding this.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Patrick Georgi <patrick.georgi@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@829 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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internal_delay(). Move that function to udelay.c and compile internal.c
only if really needed.
physmap.c is only needed if the programmer is internal or a PCI card.
Make its compilation conditional.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@822 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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enable. We could run it after chipset enable, but it definitely has to
happen before board enable because the board enable usually accesses the
SuperI/O.
With this patch, it is possible to add a struct superio to the board
enable table for more accurate matching in case subsystem IDs are
ambiguous.
This patch focuses on the generic infrastructure aspect and on support
for IT8712F/IT8716F.
Thanks go to Adrian Glaubitz and Ward Vandewege for testing.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
Acked-by: Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@813 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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disabled.
Make various pieces of code conditional on support for internal
programming. Code shared between PCI device programmers and onboard
programming is now conditional as well.
It is now possible to build only with dummy support:
make CONFIG_INTERNAL=no CONFIG_NIC3COM=no CONFIG_SATASII=no
CONFIG_DRKAISER=no CONFIG_SERPROG=no CONFIG_FT2232SPI=no
This allows building for a specific use case only, and it also
facilitates porting to a new architecture because it is possible to
focus on highlevel code only.
Note: Either internal or dummy programmer needs to be compiled in due to
the current behaviour of always picking a default programmer if -p is
not specified. Picking an arbitrary external programmer as default
wouldn't make sense.
Build and runtime tested in all 1024 possible build combinations. The
only failures are by design as mentioned above.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Sean Nelson <audiohacked@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@797 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The two existing SiS chipset enables (compared to the 28 in this patch)
were refactored, and one of them was fixed.
A function to match PCI vendor/class combinations was added to generic
code.
Tested on the "Elitegroup K7S5A". Results are somewhat unexpected (some
PCI settings seem to be inaccessible, but it still works).
This is not based on any docs, but rather on detailed analysis
of existing opensource code for some of the chipsets.
Thanks to for Adrian Glaubitz testing.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Adrian Glaubitz <glaubitz@physik.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@759 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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compiled in.
Example make commandline if you want only internal programmers:
make CONFIG_FT2232SPI=no CONFIG_SERPROG=no CONFIG_NIC3COM=no
CONFIG_SATASII=no CONFIG_DRKAISER=no CONFIG_DUMMY=no
Of course, all of the CONFIG_* symbols can be mixed and matched as
needed. CONFIG_FT2232SPI is special because even if it is enabled, make
will check if the headers are available and skip it otherwise.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@724 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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been a warning only.
Even a failing chipset init (maybe due to unknown chipset) could still
get us reasonable probe results or at least forced reads.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@708 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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instead of fallback functions. The dummy programmer is a "real"
programmer with possible side effects and its functions should not be
abused by other programmers. Make FT2232 and IT87 use official fallback
functions instead.
Create fallback_shutdown().
Create fallback_chip_writeb().
Convert the programmer #defines to an enum.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@678 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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abstraction.
Kill unneeded #include statements.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@672 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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once.
Add chip_{read,write}n to the external flasher infrastructure which
read/write n bytes at once.
Fix a few places where the code used memcpy/memcmp although that is
strictly impossible with external flashers.
Place a FIXME in the layout.c code because usage is not totally clear
and needs to be fixed to support external flashers.
As a nice side benefit, we get a noticeable speedup for builtin flash
reading which is now a memcpy() of the full flash area instead of a
series of single-byte reads.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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handle the delay on their own if needed.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Urja Rannikko <urjaman@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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and special handling here (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@531 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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others didn't (and risked non-execution of side effects) and even with
volatile, some accesses looked dubious.
Since the MMIO accessor functions and the onboard flash accessor
functions are functionally identical (but have different signatures),
make the flash accessors wrappers for the MMIO accessors.
For some of the conversions, I used Coccinelle. Semantic patch follows:
@@
typedef uint8_t;
expression a;
volatile uint8_t *b;
@@
- b[a]
+ *(b + a)
@@
expression a;
volatile uint8_t *b;
@@
- *(b) |= (a);
+ *(b) = *(b) | (a);
@@
expression a;
volatile uint8_t *b;
@@
- *(b) = (a);
+ mmio_writeb(a, b);
@@
volatile uint8_t *b;
@@
- *(b)
+ mmio_readb(b)
@@
type T;
T b;
@@
(
mmio_readb
|
mmio_writeb
)
(...,
- (T)
- (b)
+ b
)
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Uwe tested read, write, erase with this patch on a random board to make
sure nothing breaks.
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@524 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Build-tested on 32bit x86.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@521 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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chips in external flashers, they are not accessed via pointers at all.
Benefits:
This allows us to differentiate between volatile machine memory accesses
and flash chip accesses.
It also enforces usage of chip_{read,write}[bwl] to access flash chips,
so nobody will unintentionally use pointers to access chips anymore.
Some unneeded casts are removed as well.
Grepping for chip operations and machine memory operations doesn't yield
any false positives anymore.
Compile tested on 32 bit and 64 bit Linux.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@519 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flasher infrastructure. The emulation works by splitting 32 bit accesses
into 16 bit accesses and 16 bit accesses into to 8 bit accesses.
That way, external flashers can mix and match the amount of emulation
they need.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@517 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@512 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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which all programmers can use, add missing close() call (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@511 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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notation, in case there are multiple NICs in one system.
Usage: flashrom -p nic3com=bb:ss.f
Signed-off-by: Christian Ruppert <spooky85@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@510 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Read/write accesses through function pointers
- Command line parameter for internal/external flasher
- Board and chipset setup moved to internal init function
- Shutdown stuff moved to internal shutdown function
As a side benefit, this will allow us to undo chipset write enable
during shutdown.
Tested by Uwe on real hardware.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@476 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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