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This means all chipset enables etc. will be undone on shutdown.
Reversible PCI config space writes now use rpci_write_*().
PCI config space writes which are one-shot (e.g. communication via
config space) should continue to use the permanent pci_write_*
variants.
Extend the number of available register_shutdown slots to 32.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1232 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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as the subject.
Ask people to include more information in the subject line to make life
easier for developers/supporters.
Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1202 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Fix PCI device ID printing.
Remove personal e-mail addresses from the man page, point people to
flashrom@flashrom.org instead.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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programmers listed.
Fix it and mention at least the name of each programmer.
Wiki output is unchanged, and will need separate fixups.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1199 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Update programmer parameter documentation.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1197 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1196 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Programmer specific functions are of absolutely no interest to any file
except those dealing with programmer specific actions (special SPI
commands and the generic core).
The new header structure is as follows (and yes, improvements are
possible):
flashchips.h flash chip IDs
chipdrivers.h chip-specific read/write/... functions
flash.h common header for all stuff that doesn't fit elsewhere
hwaccess.h hardware access functions
programmer.h programmer specific functions
coreboot_tables.h header from coreboot, internal programmer only
spi.h SPI command definitions
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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extract_programmer_param.
Programmer parameters can no longer be separated with a
colon, they have to be separated with a comma.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1072 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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extraction from programmer_param. This led to wildly differing syntax
for programmer parameters, and it also voids pretty much every
assumption you could make about programmer_param. The latter is a
problem for libflashrom.
Use extract_param everywhere, clean up related code and make it more
foolproof.
Add two instances of exit(1) where we have no option to return an error.
Remove six instances of exit(1) where returning an error was possible.
WARNING: This changes programmer parameter syntax for a few programmers!
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Constify variables where possible.
Initialize programmer-related variables explicitly in programmer_init to
allow running programmer_init from a clean state after
programmer_shutdown.
Prohibit registering programmer shutdown functions before init or after
shutdown.
Kill some dead code.
Rename global variables with namespace-polluting names.
Use a previously unused locking helper function in sst49lfxxxc.c.
This is needed for libflashrom.
Effects on the binary size of flashrom are minimal (300 bytes
shrinkage), but the data section shrinks by 4384 bytes, and that's a
good thing if flashrom is operating in constrained envionments.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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convert general print messages to msg_g*
a few fixes as suggested by Carl-Daniel
Signed-off-by: Sean Nelson <audiohacked@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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address. That was correct for IO BARs, but failed to mask bit 3:2 for
MEM BARs, resulting in odd offsets for prefetchable MEM BARs and for
64-bit capable MEM BARs.
Mask the correct number of bits for all types of BARs and add some debug
printing about BAR type.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@946 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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We don't need to duplicate OK and NT as PCI_OK and PCI_NT if the symbols
are already there (defined for the chipset enable table).
Signed-off-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@911 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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scheme. Pointed out by Maciej Pijanka.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@754 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The new option is '-p gfxnvidia', rest of the interface is as usual.
I tested a successful identify and read on a "RIVA TNT2 Model 64/Model 64 Pro"
card for now, erase and write did NOT work properly so far!
Please do not attempt to write/erase cards yet, unless you can recover!
In addition to the NVIDIA handling code it was required to call
programmer_shutdown() in a lot more places, otherwise the graphics card
will be disabled in the init function, but never enabled again as the
shutdown function is not called.
The shutdown handling may be changed to use atexit() later.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Luc Verhaegen <libv@skynet.be>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@737 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The vendor sold different designs under that name, the patch works with
the one that has an Actel FPGA as PCI-to-Flash bridge.
The Flash chip is a "Macronix MX29F001B" (128 KB, parallel) soldered
directly to the PCB.
Flash operations (PROBE, READ, ERASE, WRITE) work as expected.
Signed-off-by: TURBO J <turboj@gmx.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@712 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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reduce #ifdef clauses a lot if we compile out some programmers
completely.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@679 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Serprog compilation is now controlled by a Makefile variable.
Replace munmap with physunmap where appropriate.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@671 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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source code and documentation accordingly.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@669 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Document new 'satasii' programmer in -L output and manpage.
- Drop PCI_IO_BASE_ADDRESS, pci.h has such #defines already.
- Beautify flashrom output and make it more consistent.
- Same for the 'make' output (reordered some $CC parameters).
Build-tested on i386, shouldn't break any builds, I think.
- Some variable renaming and other cosmetic fixes.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@529 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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controllers. It was easy because
1) flashrom has now nice API
2) documentation is public on the web site
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@527 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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(the 3C90xC ones don't). This is tested on hardware.
Also, add initial support for the Atmel AT29C010A chip (which I inserted
in a 3COM 3C90xB card for testing). It can be detected, read works, erase
works, but write will need some additional code (will post in another
patch later).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@520 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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don't properly fill the base_addr[0] struct member, so revert back to
an explicit pci_read_long() call, otherwise detection of PCI devices and
their base address will fail with strange error messages.
Thanks Idwer Vollering <vidwer@gmail.com> for reporting and testing.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@518 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Move the reusable PCI specific parts into pcidev.c, they'll be usable
for other NIC code (Realtek, VIA, ...) and also for SATA/IDE controller
cards as external programmers (for every PCI device which can program
EEPROMs basically).
Also add print_supported_pcidevs() to show the supported PCI devices
(currently only NICs, soon more) in the 'flashrom -L' output.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@515 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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