| Commit message (Collapse) | Author | Age | Files | Lines |
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This patch adds support for the "SPI 100" SPI engine in Yangtze FCHs
(found in Kabini and Temash).
Tested reading/writing on ASRock IMB-A180 and PC Engines' APU board.
Signed-off-by: Wei Hu <wei@aristanetworks.com>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1794 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Inspired by and mostly based on a patch
Signed-off-by: Mark Marshall <mark.marshall@omicron.at>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1789 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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There is no reason for negative delays in our use cases:
- We don't need it (to work around any quirks).
- sleep() (POSIX) uses an unsigned argument.
- usleep() (POSIX) uses an unsigned argument.
- Sleep() (Windows) uses an unsigned argument.
Change all callees as well (without any complications).
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1782 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Convert all physmaps in dmi.c to use aligned readonly maps.
Convert all physmaps in cbtable.c to use unaligned readonly maps.
Make physunmap() a generic architecture-independent wrapper.
Add physunmap_unaligned() to complement physmap*_unaligned().
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1765 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Combine enable_flash_ich_4e() and enable_flash_ich_dc() to
enable_flash_ich_fwh().
- Remove unjustified (chipset) name parameters from various
enable_flash_ich* functions.
- Make Poulsbo and Tunnel Creek use generic enables by refining existing
functions to work with them, including everything in ichspi.c.
- Refactor enable_flash_ich_fwh_decode() to be called unconditionally for
all chipsets.
- Add support for Intel Atom Centerton (S12x0).
- Recombine ICH2/3/4/5 to CHIPSET_ICH2345 because we treat them equally
anyway.
- Move spibar handling out of ich_init_spi() into enable_flash_ich_spi()
- Various small cleanups.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1761 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Follow the style used from ICH7 onwards to pass ich_generation
parameter to lower-level functions on older ICH chipsets too.
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1747 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The only call path where exit was reached was from physmap functions.
Callers of physmap() et al. which were not prepared to handle
ERROR_PTR return values have been adjusted.
physmap_try_ro() has been renamed to physmap_ro() and physmap_common()
slightly refactored due to the now removed *FAIL parameters.
Signed-off-by: Niklas Söderlund <niso@kth.se>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1745 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Previously we had to rely on dmidecode to decode the DMI/SMBIOS table.
This patch integrates a DMI decoder into flashrom. The old behavior of calling
dmidecode can be brought back by using CONFIG_INTERNAL_DMI=no.
Significant portions of this patch were taken from dmidecode, hence add its
authors to the copyright notice (dmidecode is also GPL2+). We do a few things
differently though. First of all we do more bounds checking to prevent accessing
unmapped memory. We do not support disovery via EFI (yet), but memory
scanning only. We handle the chassis-type lock bit correctly which dmidecode
did not for a long while.
The API to the rest of flashrom remains stable, but the output changes slightly.
To share as much code as possible (which actually is not much), i have added
dmi_fill methods that get called in dmi_init. They are reponsible to fill the
dmi_strings array and setting the is_laptop variable. After it is called, dmi_init
prints all dmi_strings. Previously the strings were printed in the order they were
discovered, followed by the chassis-type, which is now output earlier (in dmi_fill).
Because DJGPP does not support strnlen a simple implementation was added
for it.
This is still only available on x86; actually it is not even compiled in for other
architectures at all anymore.
Signed-off-by: Sean Nelson<audiohacked@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Tested-by: Maciej Pijanka <maciej.pijanka@gmail.com>
Tested-by: Idwer Vollering <vidwer@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1735 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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- Add return values to sp_flush_stream(), sp_pass_writen(),
sp_execute_opbuf(), sp_execute_opbuf_noflush(),
sp_check_opbuf_usage(), sp_do_read_n().
- Use those return values to propagate errors instead of exiting.
In some places this has to wait for core API changes (error handling for
chip_readb, chip_readn, chip_write) hence comments are added instead.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1719 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This allows to easily reconfigure a serial port as needed in
the Bus Pirate speedup patch.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1717 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Similarly to the previous PCI self-clean up patch this one allows to get rid
of a huge number of programmer shutdown functions and makes introducing
bugs harder. It adds a new function rphysmap() that takes care of unmapping
at shutdown. Callers are changed where it makes sense.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1714 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested mainboards:
OK:
- ASUS P8H77-V LE
http://www.flashrom.org/pipermail/flashrom/2013-June/011127.html
- HP Pegatron IPMEL-AE (Evans-GL6)
Reported by Idwer on IRC
- MSI MS-7379 (G31M)
http://paste.flashrom.org/view.php?id=1726
- MSI MS-7816 (H87-G43)
http://www.flashrom.org/pipermail/flashrom/2013-July/011349.html
- MSI MS-9830 (IM-945GSE-A, A9830IMS)
http://paste.flashrom.org/view.php?id=1730
- Supermicro X8SAX
http://paste.flashrom.org/view.php?id=1717
NOT OK:
- Intel D2700MUD
http://paste.flashrom.org/view.php?id=1723
- Intel DQ45CB
http://www.flashrom.org/pipermail/flashrom/2013-August/011369.html
Chipsets:
- Add PCI ID for Intel's Coleto Creek.
- Mark Intel H87 (0x8c4a) as OK.
http://www.flashrom.org/pipermail/flashrom/2013-July/011349.html
Miscellaneous:
- ichspi: Fix printing address ranges if space is divided by FPB.
- Tiny other stuff.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1709 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Detect and temporarily disable the IMC while accessing the flash.
Disable writes on default, but allow the user to enforce it.
Signed-off-by: Rudolf Marek <r.marek@assembler.cz>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: David Hendricks <dhendrix@google.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1704 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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unsigned long is not the right type for manipulating pointer values.
Since C99 there are suitable unsigned and signed types available, namely
uintptr_t and intptr_t respectively.
Use them in functions assigned to programmers' map_flash_region fields and
their callers where applicable.
This patch also changes the display width of all associated address values in
physmap.c to 16/8 hex characters depending on the actual size by
introducing a macro PRIxPTR_WIDTH and exploiting printf's * field width
specifier.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1701 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Handle long sleeps on non-Windows correctly.
Signed-off-by: Maksim Kuleshov <mmcx@mail.ru>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1667 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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It seems useful to have a generic and platform-independent method to
read and write to a serial port without blocking. This is the write part.
This allows to get rid of the explicit temporary disabling of blocking I/O in
serprog's sp_synchronize().
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1662 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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It seems useful to have a generic and platform-independent method to
read and write to a serial port without blocking. This is the read part.
It stores the current blocking properties before disabling blocking and
restores them after reading. The timeout is implemented as previously
by retrying every millisecond until the timeout is reached or enough
characters are available.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1661 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Adds support for the Altera USB-Blaster programming dongle in Active
Serial (AS) mode. Tested on both original product and a clone dongle.
Signed-off-by: James Laird <jhl@mafipulation.org>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1658 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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New IDs taken from Intel's patches for the Linux kernel.
Also, refine original Lynx Point naming etc.
Based on the chromiumos patch
Change-Id: I303a05baa80e4449e70d20adf78ebc7128b88d8e
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1656 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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pcidev_init() now returns struct pci_device * instead of a BAR stored in
PCI config space. This allows for real error checking instead of having
exit(1) everywhere in pcidev.c.
Thanks to Niklas Söderlund for coming up with the original error
handling patch which was slightly modified and folded into this patch.
Move the declaration of struct pci_device in programmer.h before the
first user.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1644 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Previously the internal programmer used its own code to initialize pcilib.
This patch extracts the common code from the internal programmer and
pcidev_init() into pcidev_init_common().
This fixes the non-existent PCI cleanup of the internal programmer and adds
an additional safety by checking for an already existing PCI context.
We got a nice shutdown function registration infrastructure, but did not use it
very wisely. Instead we added shutdown functions to a myriad of programmers
unnecessarily. In this patch we get rid of those that do only call pci_cleanup(pacc)
by adding a shutdown function the pcidev.c itself that gets registered by
pcidev_init().
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1642 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This makes some stuff const (partially to get a more convenient
libflashrom interface).
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1639 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Once upon a time usbdev_status was created for the ft2232
programmer. Its IDs are semantically different to pcidev_status
because they indicate USB instead of PCI IDs, but apart from that
both data structures are equal. This change makes life easier for
everything involved in handling and printing the status of devices
that is noted in those structures by combining them into dev_entry.
It is still possible to distinguish between PCI and USB devices
indirectly by using the struct programmer's type field.
Also, add a programmer column to the PCI and USB devices lists.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1632 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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To be able to get rid of lots of #ifdefs and centralize programmer-specific
data more...
- introduce two new fields to struct programmer_entry, namely
enum type (OTHER, USB, PCI) and union devs (pcidev_status, usbdev_status
or char *note).
- use those fields to generate device listings in print.c and print_wiki.c.
Bonus: add printing of USB devices to print_wiki.c and count supported PCI
and USB devices.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1631 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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And remove the completely unused vendor field.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1630 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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In r1577 we removed the discrimination of coreboot IDs and user-specified
mainboards. The problem is that the board enable code required to find
a board enable if either of these model strings were set. Therefore boards
running coreboot that do not need a board enable failed to execute flashrom
since then. This patch fixes this by handling coreboot IDs and user-supplied
IDs differently again.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1605 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This was broken since r1557 when we got rid of some exit calls, but returned
-1 instead which is not a valid HANDLE value.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Idwer Vollering <vidwer@gmail.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1591 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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All the driver conversion work and cleanup has been done by Stefan.
flashrom.c and cli_classic.c are a joint work of Stefan and Carl-Daniel.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1579 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Helge Wagner's patch that added VIA VX900 chipset support made me look
closer at the datasheets which led to some concise documentation about
newer VIA chipsets: http://flashrom.org/VIA
Based on that this patch adds full support for VX800/VX820, VX855/VX875
and VX900, including SPI and LPC. VT8237S was not changed (SPI support
only) because there is no public datasheet and it is not clear how to
distinguish between LPC and SPI strapping and investigations in (NDAed)
documents have not brought up anything conclusively.
enable_flash_vt823x could probably be enhanced too due to various
ignored LPC options of the chipset.
Signed-off-by: Helge Wagner <Helge.Wagner@ge.com>
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Tested-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1578 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch gets rid of some global variables and makes lots of bits along
the code path that control the board enable execution more generic and
clearer. From now on flashrom aborts on a few more occasions that should be
safer for the user. For example it aborts if the enable function for the
specified mainboard (enable) can not be found.
Parts of the board_match_cbname refactoring were done by Carl-Daniel.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1577 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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And remove the unused force parameter.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1569 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Move Mac OS X IOKit/DirectHW availability checks in the Makefile from
compiler check to pciutils check.
Print the compiler error messages for feature detection.
Add DOS libpci in the Makefile includes only if a PCI-based programmer
was requested.
Restrict mmap usage in ich_descriptors_tool to Unix style systems.
Build ich_descriptors_tool with the correct .exe extension on
DOS/Windows.
Build ich_descriptors_tool by default on x86. (Patch by Stefan Tauner)
Print the Windows version instead of "unknown machine" on Windows.
Don't #define our own __DARWIN__, use the standard OS X detection
method.
Update the README.
Add more generated files to svn:ignore
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1567 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Previously boards in the wiki were tagged either as working or as known
bad. But we added support to various boards via board enables that were
then never tested because the owners have not reported back. This can
now be tagged with NT and is shown appropriately.
Also, the underlying data structure indicating state was converted from
macros to an enum while preserving original integer values and is used
for programmers and chipsets too.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1555 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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get_io_perms() is renamed to rget_io_perms() and automatically registers
a function to release I/O permissions on shutdown.
Actually release I/O permissions on Solaris and iopl()-supporting
operating systems like Linux.
This patch fixes quite a few programmers which forgot to release I/O
permissions on shutdown, and it simplifies the shutdown and error
handling code for all others.
Do not call exit(1) if I/O permissions are denied and return an error
instead. This part of the patch was written by Niklas Söderlund.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Niklas Söderlund <niso@kth.se>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1551 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Move hwaccess.h #include from flash.h to individual drivers.
libflashrom users need flash.h, but they do not care about hwaccess.h
and should not see its definitions because they may conflict with
other hardware access functions and #defines used by the libflashrom
user.
Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1549 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Restructure PCI device detection code.
Rename pcidev_validate to pcidev_readbar.
Note: Slight changes in behaviour are possible, especially on dual/quad
chip NICs which appear as more than one PCI device. Found devices are no
longer printed at _pinfo level, but rather at _pdbg level.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1548 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Currently spi_aai_write() is implemented without an abstraction
mechanism for the programmer driver. This adds another function
pointer 'write_aai' to struct spi_programmer, which is set to
default_spi_write_aai (renamed spi_aai_write) for all programmers
for now.
A patch which utilises this abstraction in the dediprog driver will
follow.
Signed-off-by: Nico Huber <nico.huber@secunet.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1543 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add ITE IT8707F/IT8710F detection.
Note that we autodetect those chips, but we don't handle their flash
translation features automatically yet.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1533 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This adds the pony_spi driver which supports the SI_Prog adapter, which
is commonly used for SPI chips with PonyProg 2000, and a custom adapter
called "SERBANG" which differs in the logic of two pins.
Signed-off-by: Virgil-Adrian Teaca <darkstarlinux@gmail.com>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1525 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Tested Mainboards:
OK:
- ASUS M4A785T-M
http://www.flashrom.org/pipermail/flashrom/2012-April/009118.html
- ASUS P5VD2-MX
http://www.flashrom.org/pipermail/flashrom/2012-March/009014.html
- ASUS P8Z68-V PRO/GEN3
http://www.flashrom.org/pipermail/flashrom/2012-April/009086.html
- Bachmann electronic OT200
http://www.flashrom.org/pipermail/flashrom/2012-April/009094.html
- Biostar N61PB-M2S
http://www.flashrom.org/pipermail/flashrom/2012-March/008958.html
- GIGABYTE GA-H61M-D2-B3
http://www.flashrom.org/pipermail/flashrom/2012-March/009002.html
- MSI MS-7740 (H61MA-E35(B3))
http://www.flashrom.org/pipermail/flashrom/2012-March/008985.html
- Tyan S2875 (Tiger K8W)
http://www.flashrom.org/pipermail/flashrom/2012-March/008986.html
- ZOTAC nForce 630i Supreme (N73U-Supreme)
http://www.flashrom.org/pipermail/flashrom/2012-April/009073.html
- ZOTAC ZBOX AD02 (PLUS)
http://www.flashrom.org/pipermail/flashrom/2012-April/009047.html
NOT OK:
- ASRock H67M
http://www.flashrom.org/pipermail/flashrom/2012-March/008909.html
- ASUS P8P67 LE
http://paste.flashrom.org/view.php?id=1097
- ASUS Maximus IV Extreme
http://www.flashrom.org/pipermail/flashrom/2012-March/009033.html
- Biostar H61MU3
http://www.flashrom.org/pipermail/flashrom/2012-February/008832.html
- Biostar M7VIQ
http://www.flashrom.org/pipermail/flashrom/2012-February/008863.html
- Dell Inspiron 580
http://www.flashrom.org/pipermail/flashrom/2012-March/008888.html
- Dell Vostro 460
http://www.flashrom.org/pipermail/flashrom/2012-April/009144.html
- Fujitsu-Siemens CELSIUS W410 (D3062-A1)
http://www.flashrom.org/pipermail/flashrom/2012-March/008987.html
- EPoX EP-3PTA
http://www.flashrom.org/pipermail/flashrom/2012-April/009043.html
- HP XW6400
http://www.flashrom.org/pipermail/flashrom/2012-March/009006.html
- HP XW9300
http://www.flashrom.org/pipermail/flashrom/2012-February/008862.html
- Intel DG965OT
http://paste.flashrom.org/view.php?id=1096
- Intel DN2800MT (Marshalltown)
http://www.flashrom.org/pipermail/flashrom/2012-April/009095.html
- Lenovo T420
http://paste.flashrom.org/view.php?id=1095
- Lenovo X1
http://www.flashrom.org/pipermail/flashrom/2012-April/009135.html
- MSI GF615M-P33
http://www.flashrom.org/pipermail/flashrom/2012-March/008956.html
Tested flash chips:
- mark EN25Q32(A/B) as TEST_OK_PROBE (+P)
http://www.flashrom.org/pipermail/flashrom/2012-February/008832.html
- mark S25FL032A as TEST_OK_PR (+PR)
http://www.flashrom.org/pipermail/flashrom/2012-April/009105.html
- mark AT25DF161 as TEST_OK_PROBE (+P)
http://www.flashrom.org/pipermail/flashrom/2012-April/009095.html
- mark SST as TEST_OK_PREW (+EW)
http://www.flashrom.org/pipermail/flashrom/2012-April/009094.html
Tested chipset enables:
- H61 (various reports)
- SiS 755
http://www.flashrom.org/pipermail/flashrom/2012-April/009072.html
- Fix compilation of ich_descriptor_tool which was broken since r1492.
- Add Documentation regarding unlocking the ME region on Intel chipsets.
- Fix reading the flash descriptor via FDOC/FDOD and prettyprinting of the
descriptor on boards with 5 active regions.
- Reorder some boards in print.c.
- Add Intel 7 Series (Panther Point) PCI IDs.
- Add preliminary PCI IDs for future Intel chipsets (DH89xxCC and Lynx Point)
see https://lkml.org/lkml/2012/2/20/467
- Change the message for untested chipsets to send only after an attempt to
update the firmware with flashrom.
- Fix warnings in ich_descriptor_tool's build.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1524 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The ITE IT87 SPI driver uses a trick to speed up reading and writing:
If a flash chip is 512 kByte or less, the flash chip can be completely
mapped in memory and both read and write accesses are faster that way.
The current IT87 SPI code did use the parallel programmer interface for
memory mapped reads and writes, but that's the wrong abstraction. It has
been fixed to use mmio_read*/mmio_write* for that purpose.
The Winbond W83627 SPI driver uses the same trick in its read path for
all supported chip sizes. Fix it the same way.
Switch internal_chip_readn to use mmio_readn as proper abstraction.
Kudos to Michael Karcher for spotting the bugs.
Reported-by: Johan Svensson <flashrom.js@crypt.se>
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
Tested-by: Johan Svensson <flashrom.js@crypt.se>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1511 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Note: The internal programmer will abort during processor check. This is
intentional.
The other hardware drivers (except those using port I/O) should work.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: David Hendricks <dhendrix@google.com>
Tested-by: Timo Juhani Lindfors <timo.lindfors@iki.fi>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1492 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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--mainboard is a relic from a time before external programmers and makes
the CLI inconsistent.
Use a programmer parameter instead and free up the short option -m.
NOTE:
The --list-supported-wiki output changed to use -p internal:mainboard=
instead of -m
The --list-supported output changed the heading of the mainboard list
from
Vendor Board Status Required option
to
Vendor Board Status Required value for
-p internal:mainboard=
Fix lb_vendor_dev_from_string() not to write to the supplied string.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1483 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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dump file
This patch adds an external utility that shares most of the existing descriptor
decoding source code. Additionally to what is available via FDOC/FDOD this
allows to access:
- the softstraps which are used to configure the chipset by flash content
without the need for BIOS routines. on ICH8 it is possible to read those
with FDOC/FDOC too, but this was removed in later chipsets.
- the ME VSCC (Vendor Specific Component Capabilities) table. simply put,
this is an SPI chip database used to figure out the flash's capabilities.
- the MAC address stored in the GbE image.
Intel thinks this information should be confidential for ICH9 and up, but
references some tidbits in their public documentation.
This patch includes the human-readable information for ICH8, Ibex Peak
(5 series) and Cougar Point (6 series); the latter two were obtained from
leaked "SPI Flash Programming Guides" found by google. Data regarding ICH9
and 10 is unknown to us yet. It can probably found in:
"Intel® ICH7, ICH8, ICH9 and ICH10 — SPI Family Flash Programming Guide"
Information regarding the upcoming Panther Point chipset is also not included.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Matthias Wenzel <bios@mazzoo.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1480 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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All programmer types (Parallel, SPI, Opaque) now register themselves
into a generic programmer list and probing is now programmer-centric
instead of chip-centric.
Registering multiple SPI/... masters at the same time is now possible
without any problems. Handling multiple flash chips is still unchanged,
but now we have the infrastructure to deal with "dual BIOS" and "one
flash behind southbridge and one flash behind EC" sanely.
A nice side effect is that this patch kills quite a few global variables
and improves the situation for libflashrom.
Hint for developers:
struct {spi,par,opaque}_programmer now have a void *data pointer to
store any additional programmer-specific data, e.g. hardware
configuration info.
Note:
flashrom -f -c FOO -r forced_read.bin
does not work anymore. We have to find an architecturally clean way to
solve this.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1475 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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All programmer access function prototypes except init have been made
static and moved to the respective file.
A few internal functions in flash chip drivers had chipaddr parameters
which are no longer needed.
The lines touched by flashctx changes have been adjusted to 80 columns
except in header files.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1474 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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struct flashchip is used only for the flashchips array and for
operations which do not access hardware, e.g. printing a list of
supported flash chips.
struct flashctx (flash context) contains all data available in
struct flashchip, but it also contains runtime information like
mapping addresses. struct flashctx is expected to grow additional
members over time, a prime candidate being programmer info.
struct flashctx contains all of struct flashchip with identical
member layout, but struct flashctx has additional members at the end.
The separation between struct flashchip/flashctx shrinks the memory
requirement of the big flashchips array and allows future extension
of flashctx without having to worry about bloat.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1473 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Push those changes forward where needed to prevent new sign
conversion warnings where possible.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1470 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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registered.
All programmers are now calling programmer registration functions and
direct manipulations of buses_supported are not needed/possible anymore.
Note: Programmers without parallel/LPC/FWH chip support should not call
register_par_programmer().
Additional fixes:
Set max_rom_decode.parallel for drkaiser.
Remove abuse of programmer_map_flash_region in it85spi.
Annotate several FIXMEs in it85spi.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-By: Michael Karcher <flashrom@mkarcher.dialup.fu-berlin.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1463 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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spi_programmer->type
The type member is enough most of the time to derive the wanted
information, but
- not always (e.g. ich_set_bbar),
- only available after registration, which we want to delay till the
end of init, and
- we really want to distinguish between chipset version-grained
attributes which are not reflected by the registered programmer.
Hence this patch introduces a new static variable which is set up
early by the init functions and allows us to get rid of all "switch
(spi_programmer->type)" in ichspi.c. We reuse the enum introduced
for descriptor mode for the type of the new variable.
Previously magic numbers were passed by chipset_enable wrappers. Now
they use the enumeration items too. To get this working the enum
definition had to be moved to programmer.h.
Another noteworthy detail: previously we have checked for a valid
programmer/ich generation all over the place. I have removed those
checks and added one single check in the init method. Calling any
function of a programmer without executing the init method first, is
undefined behavior.
Signed-off-by: Stefan Tauner <stefan.tauner@student.tuwien.ac.at>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1460 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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