| Commit message (Collapse) | Author | Age | Files | Lines |
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(unsupported) chip erase.
Annotate SST49LF004B quirks for TBL#.
Add TEST_OK_PRW which is useful when a PREW chip gets a new erase
routine.
Change a few erase function prototypes to use unsigned int instead of
int.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Luc Verhaegen <libv@skynet.be>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@731 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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And even when it checks if the erase worked, the result of that check is
often ignored.
Convert all erase functions and actually check return codes
almost everywhere.
Check inside all erase_* routines if erase worked, not outside.
erase_sector_jedec and erase_block_jedec have changed prototypes to
enable erase checking.
Uwe successfully tested LPC on an CK804 box and SPI on some SB600 box.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Urja Rannikko <urjaman@gmail.com>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@595 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Build-tested on 32bit x86.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@521 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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chips in external flashers, they are not accessed via pointers at all.
Benefits:
This allows us to differentiate between volatile machine memory accesses
and flash chip accesses.
It also enforces usage of chip_{read,write}[bwl] to access flash chips,
so nobody will unintentionally use pointers to access chips anymore.
Some unneeded casts are removed as well.
Grepping for chip operations and machine memory operations doesn't yield
any false positives anymore.
Compile tested on 32 bit and 64 bit Linux.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@519 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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The semantic patch I used in r418 to make the original conversion to
accessor functions was missing one isomorphism:
a[b] <=> *(a+b)
The semantic patcher Coccinelle was used to create this patch. Semantic
patch follows:
@@
typedef uint8_t;
expression a;
volatile uint8_t *b;
@@
- b[a]
+ *(b + a)
@@
expression a;
volatile uint8_t *b;
@@
- *(b) = (a);
+ chip_writeb(a, b);
@@
volatile uint8_t *b;
@@
- *(b)
+ chip_readb(b)
@@
type T;
T b;
@@
(
chip_readb
|
chip_writeb
)
(...,
- (T)
- (b)
+ b
)
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@498 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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and abort any writes to locked sectors.
Verbose mode gives you all the info. Normal mode only tells you of
unlocking failed, but gives enough details to debug.
Add a comment about flash register placement to flashrom.c.
Thanks to Uwe for testing multiple iterations of this patch.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@492 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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FreeBSD definitions of (read|write)[bwl] collide with our own. Before we
attempt trickery, we can simply rename the accessor functions.
Patch created with the help of Coccinelle.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: Idwer Vollering <idwer_v@hotmail.com>
Acked-by: Patrick Georgi <patrick@georgi-clan.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@420 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flashrom: Use helper functions to access flash chips.
Right now we perform direct pointer manipulation without any abstraction
to read from and write to memory mapped flash chips. That makes it
impossible to drive any flasher which does not mmap the whole chip.
Using helper functions readb() and writeb() allows a driver for external
flash programmers like Paraflasher to replace readb and writeb with
calls to its own chip access routines.
This patch has the additional advantage of removing lots of unnecessary
casts to volatile uint8_t * and now-superfluous parentheses which caused
poor readability.
I used the semantic patcher Coccinelle to create this patch. The
semantic patch follows:
@@
expression a;
typedef uint8_t;
volatile uint8_t *b;
@@
- *(b) = (a);
+ writeb(a, b);
@@
volatile uint8_t *b;
@@
- *(b)
+ readb(b)
@@
type T;
T b;
@@
(
readb
|
writeb
)
(...,
- (T)
- (b)
+ b
)
In contrast to a sed script, the semantic patch performs type checking
before converting anything.
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Acked-by: FENG Yu Ning <fengyuning1984@gmail.com>
Tested-by: Joe Julian
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@418 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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check whether SST FWH chip was successfully erased on flashchip -E, too
(trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@212 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Some cosmetic cleanups in the flashrom code and output.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@151 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Add '(C)' where it's missing (for consistency reasons).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@136 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Change all flashrom license headers to use our standard format.
No changes in content of the files.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@131 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Cosmetic fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@130 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Drop a bunch of useless header files, merge them into flash.h.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@128 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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drop leftover includes (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@115 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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factor out register mapping code (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Unify mmap error messages in flashrom (trivial)
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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big cosmetic offensive on flashrom. (trivial)
* Give decent names to virt_addr and virt_addr_2
* add some comments
* move virtual addresses to the end of the struct,
so they dont mess up the initializer.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Trivial (cosmetic) cleanup:
* Only open /dev/mem once and do it early.
* Drop extern for function prototypes.
* Minimize ts5300 impact in probe_flash()
This cleanup will making ICH7 SPI support quite some easier.
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@100 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Coding style fixes (trivial).
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@97 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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This patch is a rework of Adam Kaufman's Solaris patch.
* flash.h:
- add a license header
- add system definitions
* flash_enable.c:
- put io priviledge access in one single place
- add includes required for Solaris.
* lbtable.c, flash_rom.c, 82802ab.c:
- use MEM_DEV so it works on Solaris
* sst49lfxxxc.c, sharplhf00l04.c, sst_fwhub.c, 82802ab.c
- drop unneeded include to sys/io.h
* Makefile
- adapt to Solaris specifics.
Signed-off-by: Adam Kaufman <adam.kaufman@pinnacle.com>
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Adam Kaufman <adam.kaufman@pinnacle.com>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@88 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Instead of checking the first byte only, the whole part is checked now. This
will detect any improper erase, closes #31
Signed-off-by: Stefan Reinauer <stepan@coresystems.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@71 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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flasrom update from Stefan, resovle issue 21
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@34 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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added -E option for chip erase, remove duplicated code
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@30 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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add retry to write_byte_program_jedec(), 99% success rate
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@29 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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enable LPC decoding for 1 MB more addresss, for supporting SST49LF00xA/B
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@28 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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SST49LF00[2,3,4] should use
the same driver as 49LF008
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@27 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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support for sst firmware hub
git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@25 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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