From 79128a97257fcf4c2d03daac2c704ddec36c9f87 Mon Sep 17 00:00:00 2001 From: hailfinger Date: Thu, 17 Dec 2009 04:22:40 +0000 Subject: probe_jedec() checks the delay value and issues programmer_delay based on the value except for delays between single chip_writeb. If a chip has zero probe_delay, delays between chip_writeb should be skipped as well. Signed-off-by: Sean Nelson Acked-by: Carl-Daniel Hailfinger git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@805 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- jedec.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) diff --git a/jedec.c b/jedec.c index 83a0b83..8ba7b06 100644 --- a/jedec.c +++ b/jedec.c @@ -96,11 +96,14 @@ int probe_jedec(struct flashchip *flash) /* Issue JEDEC Product ID Entry command */ chip_writeb(0xAA, bios + 0x5555); - programmer_delay(10); + if (probe_timing_enter) + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - programmer_delay(10); + if (probe_timing_enter) + programmer_delay(10); chip_writeb(0x90, bios + 0x5555); - programmer_delay(probe_timing_enter); + if (probe_timing_enter) + programmer_delay(probe_timing_enter); /* Read product ID */ id1 = chip_readb(bios); @@ -122,11 +125,14 @@ int probe_jedec(struct flashchip *flash) /* Issue JEDEC Product ID Exit command */ chip_writeb(0xAA, bios + 0x5555); - programmer_delay(10); + if (probe_timing_exit) + programmer_delay(10); chip_writeb(0x55, bios + 0x2AAA); - programmer_delay(10); + if (probe_timing_exit) + programmer_delay(10); chip_writeb(0xF0, bios + 0x5555); - programmer_delay(probe_timing_exit); + if (probe_timing_exit) + programmer_delay(probe_timing_exit); printf_debug("%s: id1 0x%02x, id2 0x%02x", __func__, largeid1, largeid2); if (!oddparity(id1)) -- cgit v1.2.1