From c8f9a06f6ca4171e137f35de5734be32eacf1f51 Mon Sep 17 00:00:00 2001
From: stefanct <stefanct@2b7e53f0-3cfb-0310-b3e9-8179ed1497e1>
Date: Sun, 3 Aug 2014 13:05:34 +0000
Subject: Refactor unlocking of many chips with locking at register space
 address +2.

This includes PMC Pm49*, SST 49LF00*, ST M50* and Winbond W39* families.
The erase and write test status bits of all affected chips have been reset.

Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
Signed-off-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>
Acked-by: Stefan Tauner <stefan.tauner@alumni.tuwien.ac.at>

git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1833 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 Makefile | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'Makefile')

diff --git a/Makefile b/Makefile
index 64798c9..8f2d68d 100644
--- a/Makefile
+++ b/Makefile
@@ -351,7 +351,7 @@ endif
 # Flash chip drivers and bus support infrastructure.
 
 CHIP_OBJS = jedec.o stm50.o w39.o w29ee011.o \
-	sst28sf040.o m29f400bt.o 82802ab.o pm49fl00x.o \
+	sst28sf040.o m29f400bt.o 82802ab.o \
 	sst49lfxxxc.o sst_fwhub.o flashchips.o spi.o spi25.o spi25_statusreg.o \
 	opaque.o sfdp.o en29lv640b.o at45db.o
 
-- 
cgit v1.2.1