From 66a81cd3ae8bb965d22107638db51a4f6c58d04b Mon Sep 17 00:00:00 2001 From: hailfinger Date: Fri, 10 Jul 2009 21:08:55 +0000 Subject: Add SPI multicommand infrastructure. Some SPI opcodes need to be sent in direct succession after each other without any chip deselect happening in between. A prominent example is WREN (Write Enable) directly before PP (Page Program). Intel calls the first opcode in such a row "preopcode". Right now, we ignore the direct succession requirement completely and it works pretty well because most onboard SPI masters have a timing or heuristics which make the problem disappear. The FT2232 SPI flasher is different. Since it is an external flasher, timing is very different to what we can expect from onboard flashers and this leads to failure at slow speeds. This patch allows any function to submit multiple SPI commands in a stream to any flasher. Support in the individual flashers isn't implemented yet, so there is one generic function which passes the each command in the stream one-by-one to the command functions of the selected SPI flash driver. Signed-off-by: Carl-Daniel Hailfinger Acked-by: Jakob Bornecrantz Tested-by: Jakob Bornecrantz git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@645 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- dummyflasher.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'dummyflasher.c') diff --git a/dummyflasher.c b/dummyflasher.c index 64b083e..1b51032 100644 --- a/dummyflasher.c +++ b/dummyflasher.c @@ -141,7 +141,7 @@ void dummy_chip_readn(uint8_t *buf, const chipaddr addr, size_t len) return; } -int dummy_spi_command(unsigned int writecnt, unsigned int readcnt, +int dummy_spi_send_command(unsigned int writecnt, unsigned int readcnt, const unsigned char *writearr, unsigned char *readarr) { int i; -- cgit v1.2.1