From 1258228f6cee785ba4426d223a356b3ef7439481 Mon Sep 17 00:00:00 2001 From: hailfinger Date: Sat, 5 Jan 2013 23:52:45 +0000 Subject: Decouple BAR reading from pci device init, handle errors gracefully. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit pcidev_init() now returns struct pci_device * instead of a BAR stored in PCI config space. This allows for real error checking instead of having exit(1) everywhere in pcidev.c. Thanks to Niklas Söderlund for coming up with the original error handling patch which was slightly modified and folded into this patch. Move the declaration of struct pci_device in programmer.h before the first user. Signed-off-by: Carl-Daniel Hailfinger Acked-by: Stefan Tauner git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1644 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- gfxnvidia.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'gfxnvidia.c') diff --git a/gfxnvidia.c b/gfxnvidia.c index a994d68..d0a9feb 100644 --- a/gfxnvidia.c +++ b/gfxnvidia.c @@ -85,14 +85,17 @@ static int gfxnvidia_shutdown(void *data) int gfxnvidia_init(void) { + struct pci_dev *dev = NULL; uint32_t reg32; if (rget_io_perms()) return 1; - /* No need to check for errors, pcidev_init() will not return in case of errors. */ - io_base_addr = pcidev_init(PCI_BASE_ADDRESS_0, gfx_nvidia); + dev = pcidev_init(gfx_nvidia, PCI_BASE_ADDRESS_0); + if (!dev) + return 1; + io_base_addr = pcidev_readbar(dev, PCI_BASE_ADDRESS_0); io_base_addr += 0x300000; msg_pinfo("Detected NVIDIA I/O base address: 0x%x.\n", io_base_addr); @@ -102,9 +105,9 @@ int gfxnvidia_init(void) return 1; /* Allow access to flash interface (will disable screen). */ - reg32 = pci_read_long(pcidev_dev, 0x50); + reg32 = pci_read_long(dev, 0x50); reg32 &= ~(1 << 0); - rpci_write_long(pcidev_dev, 0x50, reg32); + rpci_write_long(dev, 0x50, reg32); /* Write/erase doesn't work. */ programmer_may_write = 0; -- cgit v1.2.1