From edd2a4a5fb90140ce4ee969ad04e53d6777d0ea3 Mon Sep 17 00:00:00 2001 From: hailfinger Date: Sat, 10 Jul 2010 16:56:32 +0000 Subject: Autodetect the ITE IT8705 Super I/O and enable flash writes if it performs LPC->Parallel translation. Remove board enables which triggered the IT8705 write enable manually. Change the IT87 SPI special case to cover IT87 LPC->SPI and LPC->Parallel translation. Signed-off-by: Carl-Daniel Hailfinger Tested on Syntax SV266A. Acked-by: Paul Menzel Tested on Shuttle AK38N, all operations work fine. Acked-by: Uwe Hermann git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1073 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- internal.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'internal.c') diff --git a/internal.c b/internal.c index 7b31e79..f99a4cc 100644 --- a/internal.c +++ b/internal.c @@ -229,8 +229,10 @@ int internal_init(void) } #if defined(__i386__) || defined(__x86_64__) - /* Probe for IT87* LPC->SPI translation unconditionally. */ - it87xx_probe_spi_flash(NULL); + /* Probe unconditionally for IT87* LPC->SPI translation and for + * IT87* Parallel write enable. + */ + init_superio_ite(); #endif board_flash_enable(lb_vendor, lb_part); -- cgit v1.2.1