From c32b60fea6f8e52a4f8c08e930be6ecc035f5a72 Mon Sep 17 00:00:00 2001 From: uwe Date: Sun, 8 Aug 2010 17:04:21 +0000 Subject: Fix typo (s/Bit/Bits/) to clarify code comment. Signed-off-by: David Borg Acked-by: Uwe Hermann git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1135 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- nicnatsemi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'nicnatsemi.c') diff --git a/nicnatsemi.c b/nicnatsemi.c index 193a86e..1683857 100644 --- a/nicnatsemi.c +++ b/nicnatsemi.c @@ -68,8 +68,8 @@ void nicnatsemi_chip_writeb(uint8_t val, chipaddr addr) /* * The datasheet requires 32 bit accesses to this register, but it seems * that requirement might only apply if the register is memory mapped. - * Bit 8-31 of this register are apparently don't care, and if this - * register is I/O port mapped 8 bit accesses to the lowest byte of the + * Bits 8-31 of this register are apparently don't care, and if this + * register is I/O port mapped, 8 bit accesses to the lowest byte of the * register seem to work fine. Due to that, we ignore the advice in the * data sheet. */ @@ -82,8 +82,8 @@ uint8_t nicnatsemi_chip_readb(const chipaddr addr) /* * The datasheet requires 32 bit accesses to this register, but it seems * that requirement might only apply if the register is memory mapped. - * Bit 8-31 of this register are apparently don't care, and if this - * register is I/O port mapped 8 bit accesses to the lowest byte of the + * Bits 8-31 of this register are apparently don't care, and if this + * register is I/O port mapped, 8 bit accesses to the lowest byte of the * register seem to work fine. Due to that, we ignore the advice in the * data sheet. */ -- cgit v1.2.1