From 526905c27f01f5f30a7a60107c028b57bbadef32 Mon Sep 17 00:00:00 2001 From: stefanct Date: Wed, 20 Aug 2014 15:39:32 +0000 Subject: Add support for Intel Silvermont: Bay Trail, Rangeley and Avoton. The core of this patch to support Bay Trail originally came from the Chromiumos flashrom repo and was modified by Sage to support the Rangeley/Avoton parts as well. Because that was not complicated enough already Stefan Tauner refactored and refined everything. Bay Trail seems to be the first Atom SoC able to support hwseq. No SPI Programming Guide could be obtained so it is handled similarly to Lynx Point which seems to be its nearest relative. Signed-off-by: Duncan Laurie Signed-off-by: Martin Roth Signed-off-by: Stefan Tauner Tested-by: Marc Jones Tested-by: Stefan Tauner Tested-by: Thomas Reardon Tested-by: Wen Wang Acked-By: Marc Jones Acked-by: Stefan Tauner git-svn-id: https://code.coreboot.org/svn/flashrom/trunk@1844 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- programmer.h | 1 + 1 file changed, 1 insertion(+) (limited to 'programmer.h') diff --git a/programmer.h b/programmer.h index ab0d844..5ac54e7 100644 --- a/programmer.h +++ b/programmer.h @@ -600,6 +600,7 @@ enum ich_chipset { CHIPSET_6_SERIES_COUGAR_POINT, CHIPSET_7_SERIES_PANTHER_POINT, CHIPSET_8_SERIES_LYNX_POINT, + CHIPSET_BAYTRAIL, /* Actually all with Silvermont architecture: Bay Trail, Avoton/Rangeley */ CHIPSET_8_SERIES_LYNX_POINT_LP, CHIPSET_8_SERIES_WELLSBURG, }; -- cgit v1.2.1