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authorjonas <jonas@3ad0048d-3df7-0310-abae-a5850022a9f2>2021-04-15 19:16:05 +0000
committerjonas <jonas@3ad0048d-3df7-0310-abae-a5850022a9f2>2021-04-15 19:16:05 +0000
commitee23007947377e9913bf91ee9ad37198defc51ba (patch)
tree6daf0565f8b95d4e3afb2b6b173cf43a12bc0d9d
parentca959f9a9cae9a69ee4d18639d7263e71485dd2d (diff)
downloadfpc-ee23007947377e9913bf91ee9ad37198defc51ba.tar.gz
--- Merging r49206 into '.':
U compiler/aarch64/aasmcpu.pas --- Recording mergeinfo for merge of r49206 into '.': U . --- Merging r49207 into '.': U compiler/aarch64/rgcpu.pas A tests/webtbs/tw38053.pp --- Recording mergeinfo for merge of r49207 into '.': G . git-svn-id: https://svn.freepascal.org/svn/fpc/branches/fixes_3_2@49208 3ad0048d-3df7-0310-abae-a5850022a9f2
-rw-r--r--compiler/aarch64/aasmcpu.pas8
-rw-r--r--compiler/aarch64/rgcpu.pas8
-rw-r--r--tests/webtbs/tw38053.pp69
3 files changed, 81 insertions, 4 deletions
diff --git a/compiler/aarch64/aasmcpu.pas b/compiler/aarch64/aasmcpu.pas
index c83724e6b0..d1e2f96af5 100644
--- a/compiler/aarch64/aasmcpu.pas
+++ b/compiler/aarch64/aasmcpu.pas
@@ -924,6 +924,13 @@ implementation
{ check for pre/post indexed in spilling_get_operation_type_ref }
result:=operand_read;
end;
+ A_MOVK:
+ begin
+ if opnr=0 then
+ result:=operand_readwrite
+ else
+ result:=operand_read;
+ end;
{$ifdef EXTDEBUG}
{ play save to avoid hard to find bugs, better fail at compile time }
A_ADD,
@@ -958,7 +965,6 @@ implementation
A_LSR,
A_LSRV,
A_MOV,
- A_MOVK,
A_MOVN,
A_MOVZ,
A_MSUB,
diff --git a/compiler/aarch64/rgcpu.pas b/compiler/aarch64/rgcpu.pas
index 4b679c469a..3650f2c9a9 100644
--- a/compiler/aarch64/rgcpu.pas
+++ b/compiler/aarch64/rgcpu.pas
@@ -1,7 +1,7 @@
{
Copyright (c) 1998-2002 by Florian Klaempfl
- This unit implements the SPARC specific class for the register
+ This unit implements the AArch64 specific class for the register
allocator
This program is free software; you can redistribute it and/or modify
@@ -87,8 +87,8 @@ implementation
begin
helplist:=TAsmList.create;
- if getregtype(tempreg)=R_INTREGISTER then
- hreg:=tempreg
+ if (getregtype(tempreg)=R_INTREGISTER) then
+ hreg:=getregisterinline(helplist,[R_SUBWHOLE])
else
hreg:=cg.getaddressregister(helplist);
@@ -100,6 +100,8 @@ implementation
else
helpins:=spilling_create_store(tempreg,tmpref);
helplist.concat(helpins);
+ if (getregtype(tempreg)=R_INTREGISTER) then
+ ungetregisterinline(helplist,hreg);
add_cpu_interferences(helpins);
list.insertlistafter(pos,helplist);
helplist.free;
diff --git a/tests/webtbs/tw38053.pp b/tests/webtbs/tw38053.pp
new file mode 100644
index 0000000000..384b234e75
--- /dev/null
+++ b/tests/webtbs/tw38053.pp
@@ -0,0 +1,69 @@
+{ %opt=-Sg }
+
+program fsz;
+// fpc -OoREGVAR az.pas; ./az
+// fpc -OoNoREGVAR az.pas; ./az
+
+// {$mode delphi}
+{$mode objfpc}
+
+Type
+ ByteRA0 = array [0..0] of byte;
+ Bytep0 = ^ByteRA0;
+TNIFTIhdr = record //Next: analyze Format Header structure
+ HdrSz : longint; //MUST BE 348
+end;
+
+function readTiff(fnm: string; nhdr: TNIFTIhdr; img: byteP0): string;
+label
+ 555;
+type
+ TTIFFhdr = record
+ Compression, ImageHeight, ImageWidth,
+ NewSubfileType: uint32;
+ end;
+const
+ kMaxIFD = 2200;
+ kVal = 1050090;
+var
+ fsz, i, ok1: integer{int64};
+ jj,w, nTag, nIFD: uint32 {uint64};
+ hdr: array[1..kMaxIFD] of TTIFFhdr;
+begin
+ result := '';
+ fsz := kVal;
+ ok1 := kVal;
+ jj := kVal;
+ w := kVal;
+ i := kVal;
+ nTag := kVal;
+ nIFD := kVal;
+ writeln('Value ', fsz,' ',ok1,' ',jj,' ',w,' ',i,' ',nTag,' ',nIFD,' -- ', kVal);
+ if fsz <> kVal then
+ halt(1);
+ if ok1 <> kVal then
+ halt(2);
+ if jj <> kVal then
+ halt(3);
+ if w <> kVal then
+ halt(4);
+ if i <> kVal then
+ halt(5);
+ if nTag <> kVal then
+ halt(6);
+ if nIFD <> kVal then
+ halt(7);
+ 555:
+end;
+
+procedure ReportTiff();
+var
+ img: byteP0;
+ nhdr: TNIFTIhdr;
+begin
+ readTiff('xxx', nhdr, img);
+end;
+
+begin
+ ReportTiff();
+end.