Fixed the elfreader, so it correctly reads the riscv type.

Set the default machineflag to rvc+rvf+rvd.

git-svn-id: https://svn.freepascal.org/svn/fpc/branches/laksen@39495 3ad0048d-3df7-0310-abae-a5850022a9f2

3 files changed, 12 insertions, 0 deletions

diff --git a/riscv_new/packages/fcl-res/src/elfconsts.pp b/riscv_new/packages/fcl-res/src/elfconsts.pp
index 6b67d9c6bd..5cdefc7d91 100644
--- a/riscv_new/packages/fcl-res/src/elfconsts.pp
+++ b/riscv_new/packages/fcl-res/src/elfconsts.pp
@@ -79,6 +79,13 @@ const
   //machine-specific flags
   EF_IA_64_ABI64 = $10;  //wow, this is really a 64-bit object file!
 
+  // riscv flags
+  EF_RISCV_RVC = 1;
+
+  //  bitfield of 2 indicating the largest float abi supported
+  EF_RISCV_FLOAT_ABI_SINGLE = 2;
+  EF_RISCV_FLOAT_ABI_DOUBLE = 4;
+
   //section type
   SHT_NULL     =  0;
   SHT_PROGBITS =  1;
diff --git a/riscv_new/packages/fcl-res/src/elfreader.pp b/riscv_new/packages/fcl-res/src/elfreader.pp
index c6774a6ee6..b1d9d4f0ad 100644
--- a/riscv_new/packages/fcl-res/src/elfreader.pp
+++ b/riscv_new/packages/fcl-res/src/elfreader.pp
@@ -290,6 +290,10 @@ begin
                     fMachineType:=emtmipsel
                   else
                     fMachineType:=emtmips;
+      EM_RISCV  : if fBits=ELFCLASS32 then
+                    fMachineType:=emtriscv32
+                  else
+                    fMachineType:=emtriscv64;
     end;
   finally
     subreader.Free;
diff --git a/riscv_new/packages/fcl-res/src/elfsubwriter.inc b/riscv_new/packages/fcl-res/src/elfsubwriter.inc
index 0e88250fbe..e2eabb6e71 100644
--- a/riscv_new/packages/fcl-res/src/elfsubwriter.inc
+++ b/riscv_new/packages/fcl-res/src/elfsubwriter.inc
@@ -442,6 +442,7 @@ begin
   fDataAlignment:=4;
   {$ENDIF}
   if aMachineType=EM_IA_64 then fMachineFlags:=EF_IA_64_ABI64
+  else if aMachineType=EM_RISCV then fMachineFlags:=EF_RISCV_FLOAT_ABI_DOUBLE or EF_RISCV_RVC // This is the default class for now
   else fMachineFlags:=0;
 end;