* fix int to real for non-register locations

git-svn-id: https://svn.freepascal.org/svn/fpc/branches/laksen@39491 3ad0048d-3df7-0310-abae-a5850022a9f2

1 files changed, 3 insertions, 11 deletions

diff --git a/riscv_new/compiler/riscv64/nrv64cnv.pas b/riscv_new/compiler/riscv64/nrv64cnv.pas
index 271fec5ebf..65c3714b36 100644
--- a/riscv_new/compiler/riscv64/nrv64cnv.pas
+++ b/riscv_new/compiler/riscv64/nrv64cnv.pas
@@ -113,17 +113,9 @@ unit nrv64cnv;
         restype:=tfloatdef(resultdef).floattype;
 
         location.Register := cg.getfpuregister(current_asmdata.CurrAsmList, tfloat2tcgsize[restype]);
-        if (left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
-          begin
-            current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(ops[is_64bit(left.resultdef),is_signed(left.resultdef),restype], location.register, left.location.register));
-          end
-        else
-          begin
-            { Load memory in fpu register }
-            hlcg.location_force_mem(current_asmdata.CurrAsmList, left.location, left.resultdef);
-            cg.a_loadfpu_ref_reg(current_asmdata.CurrAsmList, location.size, location.size, left.location.reference, location.Register);
-            tg.ungetiftemp(current_asmdata.CurrAsmList, left.location.reference);
-          end;
+        if not(left.location.loc in [LOC_REGISTER,LOC_CREGISTER]) then
+          hlcg.location_force_reg(current_asmdata.CurrAsmList, left.location, left.resultdef, left.resultdef, true);
+        current_asmdata.CurrAsmList.concat(taicpu.op_reg_reg(ops[is_64bit(left.resultdef),is_signed(left.resultdef),restype], location.register, left.location.register));
       end;
 
 begin