* RISC-V 32 compilation fixed

+ lazarus project file for the compiler added


git-svn-id: https://svn.freepascal.org/svn/fpc/branches/laksen@39511 3ad0048d-3df7-0310-abae-a5850022a9f2

7 files changed, 103 insertions, 14 deletions

diff --git a/riscv_new/compiler/ppcriscv32.lpi b/riscv_new/compiler/ppcriscv32.lpi
new file mode 100644
index 0000000000..2f948f5720
--- /dev/null
+++ b/riscv_new/compiler/ppcriscv32.lpi
@@ -0,0 +1,86 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<CONFIG>
+  <ProjectOptions>
+    <Version Value="11"/>
+    <PathDelim Value="\"/>
+    <General>
+      <Flags>
+        <MainUnitHasUsesSectionForAllUnits Value="False"/>
+        <MainUnitHasCreateFormStatements Value="False"/>
+        <MainUnitHasTitleStatement Value="False"/>
+        <LRSInOutputDirectory Value="False"/>
+      </Flags>
+      <SessionStorage Value="InProjectDir"/>
+      <MainUnit Value="0"/>
+      <Title Value="ppcrv32"/>
+    </General>
+    <BuildModes Count="1">
+      <Item1 Name="default" Default="True"/>
+    </BuildModes>
+    <PublishOptions>
+      <Version Value="2"/>
+      <IncludeFileFilter Value="*.(pas|pp|inc|lfm|lpr|lrs|lpi|lpk|sh|xml)"/>
+      <ExcludeFileFilter Value="*.(bak|ppu|ppw|o|so);*~;backup"/>
+    </PublishOptions>
+    <RunParams>
+      <FormatVersion Value="2"/>
+      <Modes Count="1">
+        <Mode0 Name="default">
+          <local>
+            <LaunchingApplication PathPlusParams="\usr\X11R6\bin\xterm -T 'Lazarus Run Output' -e $(LazarusDir)\tools\runwait.sh $(TargetCmdLine)"/>
+          </local>
+        </Mode0>
+      </Modes>
+    </RunParams>
+    <Units Count="4">
+      <Unit0>
+        <Filename Value="pp.pas"/>
+        <IsPartOfProject Value="True"/>
+      </Unit0>
+      <Unit1>
+        <Filename Value="riscv32\aasmcpu.pas"/>
+        <IsPartOfProject Value="True"/>
+      </Unit1>
+      <Unit2>
+        <Filename Value="riscv32\aoptcpu.pas"/>
+        <IsPartOfProject Value="True"/>
+      </Unit2>
+      <Unit3>
+        <Filename Value="aopt.pas"/>
+        <IsPartOfProject Value="True"/>
+      </Unit3>
+    </Units>
+  </ProjectOptions>
+  <CompilerOptions>
+    <Version Value="11"/>
+    <PathDelim Value="\"/>
+    <Target>
+      <Filename Value="riscv32\pp"/>
+    </Target>
+    <SearchPaths>
+      <IncludeFiles Value="riscv32;riscv"/>
+      <OtherUnitFiles Value="riscv32;riscv;systems"/>
+      <UnitOutputDirectory Value="riscv32\lazbuild"/>
+    </SearchPaths>
+    <Parsing>
+      <SyntaxOptions>
+        <CStyleOperator Value="False"/>
+        <AllowLabel Value="False"/>
+        <CPPInline Value="False"/>
+        <UseAnsiStrings Value="False"/>
+      </SyntaxOptions>
+    </Parsing>
+    <Other>
+      <Verbosity>
+        <ShowWarn Value="False"/>
+        <ShowNotes Value="False"/>
+        <ShowHints Value="False"/>
+      </Verbosity>
+      <ConfigFile>
+        <StopAfterErrCount Value="50"/>
+      </ConfigFile>
+      <CustomOptions Value="-driscv32
+-Sew"/>
+    </Other>
+  </CompilerOptions>
+</CONFIG>
diff --git a/riscv_new/compiler/riscv32/cgcpu.pas b/riscv_new/compiler/riscv32/cgcpu.pas
index b1830b938b..ad2229f0da 100644
--- a/riscv_new/compiler/riscv32/cgcpu.pas
+++ b/riscv_new/compiler/riscv32/cgcpu.pas
@@ -163,7 +163,7 @@ unit cgcpu;
             if current_procinfo.framepointer<>NR_STACK_POINTER_REG then
               a_reg_alloc(list,NR_FRAME_POINTER_REG);
 
-            reference_reset_base(href,NR_STACK_POINTER_REG,-4,0);
+            reference_reset_base(href,NR_STACK_POINTER_REG,-4,ctempposinvalid,0,[]);
 
             { Int registers }
             regs:=rg[R_INTREGISTER].used_in_proc-paramanager.get_volatile_registers_int(pocall_stdcall);
@@ -248,7 +248,7 @@ unit cgcpu;
               regs:=regs+[RS_RETURN_ADDRESS_REG];
 
             stackcount:=0;
-            reference_reset_base(href,NR_STACK_POINTER_REG,-4,0);
+            reference_reset_base(href,NR_STACK_POINTER_REG,-4,ctempposinvalid,0,[]);
             for r:=RS_X31 downto RS_X0 do
               if r in regs then
                 dec(href.offset,4);
@@ -373,7 +373,7 @@ unit cgcpu;
             src:=src2
           else
             begin
-              reference_reset(src,sizeof(aint));
+              reference_reset(src,sizeof(aint),[]);
               { load the address of src2 into src.base }
               src.base := GetAddressRegister(list);
               a_loadaddr_ref_reg(list, src2, src.base);
@@ -382,7 +382,7 @@ unit cgcpu;
             dst:=dst2
           else
             begin
-              reference_reset(dst,sizeof(aint));
+              reference_reset(dst,sizeof(aint),[]);
               { load the address of dst2 into dst.base }
               dst.base := GetAddressRegister(list);
               a_loadaddr_ref_reg(list, dst2, dst.base);
diff --git a/riscv_new/compiler/riscv32/cpubase.pas b/riscv_new/compiler/riscv32/cpubase.pas
index feb63fc5b5..46ec67c966 100644
--- a/riscv_new/compiler/riscv32/cpubase.pas
+++ b/riscv_new/compiler/riscv32/cpubase.pas
@@ -38,6 +38,8 @@ uses
 
     type
       TAsmOp=(A_None,
+        { Pseudo instructions }
+        A_NOP,
         { normal opcodes }
         A_LUI,A_AUIPC,A_JAL,A_JALR,
         A_Bxx,A_LB,A_LH,A_LW,A_LBU,A_LHU,
diff --git a/riscv_new/compiler/riscv32/cpunode.pas b/riscv_new/compiler/riscv32/cpunode.pas
index a87c8d51bd..463614ddf5 100644
--- a/riscv_new/compiler/riscv32/cpunode.pas
+++ b/riscv_new/compiler/riscv32/cpunode.pas
@@ -43,8 +43,8 @@ unit cpunode;
        nrvset,
        nrvinl,
        nrv32mat,
-       nrv32cnv,
-       nrvcon
+       nrv32cnv
+//       ,nrvcon
        ;
 
 end.
diff --git a/riscv_new/compiler/riscv32/itcpugas.pas b/riscv_new/compiler/riscv32/itcpugas.pas
index 190b7bfbb2..7ef91d58dc 100644
--- a/riscv_new/compiler/riscv32/itcpugas.pas
+++ b/riscv_new/compiler/riscv32/itcpugas.pas
@@ -30,6 +30,7 @@ interface
 
     const
       gas_op2str: array[tasmop] of string[14] = ('<none>',
+        'nop',
         'lui','auipc','jal','jalr',
         'b','lb','lh','lw','lbu','lhu',
         'sb','sh','sw',
diff --git a/riscv_new/compiler/riscv32/nrv32cal.pas b/riscv_new/compiler/riscv32/nrv32cal.pas
index 4896c362c3..a043a3b6c0 100644
--- a/riscv_new/compiler/riscv32/nrv32cal.pas
+++ b/riscv_new/compiler/riscv32/nrv32cal.pas
@@ -42,7 +42,7 @@ implementation
       cgbase,pass_2,
       cpuinfo,cpubase,aasmbase,aasmtai,aasmdata,aasmcpu,
       nmem,nld,ncnv,
-      ncgutil,cgutils,cgobj,tgobj,regvars,rgobj,rgcpu,
+      ncgutil,cgutils,cgobj,tgobj,rgobj,rgcpu,
       cg64f32,cgcpu,cpupi,procinfo;
 
 
diff --git a/riscv_new/compiler/riscv32/rarv32gas.pas b/riscv_new/compiler/riscv32/rarv32gas.pas
index b4ca7843c6..c93feb374b 100644
--- a/riscv_new/compiler/riscv32/rarv32gas.pas
+++ b/riscv_new/compiler/riscv32/rarv32gas.pas
@@ -52,7 +52,7 @@ Unit rarv32gas;
       { aasm }
       cpubase,aasmbase,aasmtai,aasmdata,aasmcpu,
       { symtable }
-      symconst,symsym,
+      symconst,symdef,symsym,
       { parser }
       procinfo,
       rabase,rautils,
@@ -62,7 +62,7 @@ Unit rarv32gas;
     procedure trv32attreader.ReadSym(oper : trvoperand);
       var
          tempstr, mangledname : string;
-         typesize,l,k : aint;
+         l,k,typesize : tcgint;
       begin
         tempstr:=actasmpattern;
         Consume(AS_ID);
@@ -139,7 +139,7 @@ Unit rarv32gas;
         end;
 
       var
-        l : aint;
+        l : tcgint;
         relsym: string;
         asmsymtyp: tasmsymtype;
         isflags: tindsymflags;
@@ -201,7 +201,7 @@ Unit rarv32gas;
                     if (relsym<>'') then
                       begin
                         if (oper.opr.typ = OPR_REFERENCE) then
-                          oper.opr.ref.relsymbol:=current_asmdata.RefAsmSymbol(relsym)
+                          oper.opr.ref.relsymbol:=current_asmdata.RefAsmSymbol(relsym,AT_DATA)
                         else
                           begin
                             Message(asmr_e_invalid_reference_syntax);
@@ -256,7 +256,7 @@ Unit rarv32gas;
     Procedure trv32attreader.BuildOperand(oper : trvoperand);
       var
         expr : string;
-        typesize,l : aint;
+        typesize,l : tcgint;
 
 
         procedure AddLabelOperand(hl:tasmlabel);
@@ -281,7 +281,7 @@ Unit rarv32gas;
             hasdot  : boolean;
             l,
             toffset,
-            tsize   : aint;
+            tsize   : tcgint;
           begin
             if not(actasmtoken in [AS_DOT,AS_PLUS,AS_MINUS]) then
              exit;
@@ -319,7 +319,7 @@ Unit rarv32gas;
                     if (oper.opr.val<>0) then
                       Message(asmr_e_wrong_sym_type);
                     oper.opr.typ:=OPR_SYMBOL;
-                    oper.opr.symbol:=current_asmdata.DefineAsmSymbol(mangledname,AB_EXTERNAL,AT_FUNCTION);
+                    oper.opr.symbol:=current_asmdata.DefineAsmSymbol(mangledname,AB_EXTERNAL,AT_FUNCTION,voidcodepointertype);
                   end
                 else
                   inc(oper.opr.val,l);