Update RiscV64 support to 2.1 and privileged standard 1.9.

Added riscv64-embedded target.
Fixed bug where memory operations wouldn't work with immediate offsets.

git-svn-id: http://svn.freepascal.org/svn/fpc/branches/laksen@34089 3ad0048d-3df7-0310-abae-a5850022a9f2

14 files changed, 184 insertions, 17 deletions

diff --git a/riscv/trunk/compiler/riscv/aasmcpu.pas b/riscv/trunk/compiler/riscv/aasmcpu.pas
index 0a4ed487b7..501f31def1 100644
--- a/riscv/trunk/compiler/riscv/aasmcpu.pas
+++ b/riscv/trunk/compiler/riscv/aasmcpu.pas
@@ -431,8 +431,9 @@ uses cutils, cclasses;
           A_XORI,A_ORI,A_ANDI,
           A_SLLI,A_SRLI,A_SRAI,
 
-          A_FENCE,A_FENCE_I,A_SCALL,A_SBREAK,
-          A_RDCYCLE,A_RDCYCLEH,A_RDTIME,A_RDTIMEH,A_RDINSTRET,A_RDINSTRETH,
+          A_FENCE,A_FENCE_I,
+          A_ECALL,A_EBREAK,
+          A_CSRRW,A_CSRRS,A_CSRRC,A_CSRRWI,A_CSRRSI,A_CSRRCI,
 
           A_FRCSR,A_FRRM,A_FRFLAGS,A_FSCSR,A_FSRM,
           A_FSFLAGS,A_FSRMI,A_FSFLAGSI:
diff --git a/riscv/trunk/compiler/riscv/cgrv.pas b/riscv/trunk/compiler/riscv/cgrv.pas
index 5ac5e112ce..5ae166f3ee 100644
--- a/riscv/trunk/compiler/riscv/cgrv.pas
+++ b/riscv/trunk/compiler/riscv/cgrv.pas
@@ -440,6 +440,15 @@ unit cgrv;
               ref.index:=tmpreg
             else
               ref.base:=tmpreg;
+          end
+        else if (ref.index=NR_NO) and
+                (ref.base=NR_NO) then
+          begin              
+            tmpreg:=getintregister(list,OS_INT);
+
+            a_load_const_reg(list, OS_ADDR,ref.offset,tmpreg);
+
+            reference_reset_base(ref,tmpreg,0,ref.alignment);
           end;
 
         if (ref.index<>NR_NO) and
diff --git a/riscv/trunk/compiler/riscv64/cpubase.pas b/riscv/trunk/compiler/riscv64/cpubase.pas
index cfbf68b8e7..eaaac40286 100644
--- a/riscv/trunk/compiler/riscv64/cpubase.pas
+++ b/riscv/trunk/compiler/riscv64/cpubase.pas
@@ -46,8 +46,9 @@ type
         A_SLLI,A_SRLI,A_SRAI,
         A_ADD,A_SUB,A_SLL,A_SLT,A_SLTU,
         A_XOR,A_SRL,A_SRA,A_OR,A_AND,
-        A_FENCE,A_FENCE_I,A_SCALL,A_SBREAK,
-        A_RDCYCLE,A_RDCYCLEH,A_RDTIME,A_RDTIMEH,A_RDINSTRET,A_RDINSTRETH,
+        A_FENCE,A_FENCE_I,
+        A_ECALL,A_EBREAK,
+        A_CSRRW,A_CSRRS,A_CSRRC,A_CSRRWI,A_CSRRSI,A_CSRRCI,
         { 64-bit }
         A_ADDIW,A_SLLIW,A_SRLIW,A_SRAIW,
         A_ADDW,A_SLLW,A_SRLW,A_SUBW,A_SRAW,
@@ -93,7 +94,14 @@ type
         A_FCVT_W_D,A_FCVT_WU_D,A_FCVT_D_W,A_FCVT_D_WU,
         { 64-bit }
         A_FCVT_L_D,A_FCVT_LU_D,A_FMV_X_D,
-        A_FCVT_D_L,A_FCVT_D_LU,A_FMV_D_X
+        A_FCVT_D_L,A_FCVT_D_LU,A_FMV_D_X,
+
+        { Machine mode }
+        A_MRET,A_HRET,A_SRET,A_URET,
+        A_WFI,
+
+        { Supervisor }
+        A_SFENCE_VM
         );
 
   {# This should define the array of instructions as string }
diff --git a/riscv/trunk/compiler/riscv64/cputarg.pas b/riscv/trunk/compiler/riscv64/cputarg.pas
index 3390c8089a..6986b1f2b6 100644
--- a/riscv/trunk/compiler/riscv64/cputarg.pas
+++ b/riscv/trunk/compiler/riscv64/cputarg.pas
@@ -38,6 +38,9 @@ implementation
     {$ifndef NOTARGETLINUX}
       ,t_linux
     {$endif}
+    {$ifndef NOTARGETEMBEDDED}
+      ,t_embed
+    {$endif}
 
 {**************************************
              Assemblers
diff --git a/riscv/trunk/compiler/riscv64/itcpugas.pas b/riscv/trunk/compiler/riscv64/itcpugas.pas
index e222aa84ff..01d58cff4c 100644
--- a/riscv/trunk/compiler/riscv64/itcpugas.pas
+++ b/riscv/trunk/compiler/riscv64/itcpugas.pas
@@ -38,8 +38,9 @@ unit itcpugas;
         'slli','srli','srai',
         'add','sub','sll','slt','sltu',
         'xor','srl','sra','or','and',
-        'fence','fence.i','scall','sbreak',
-        'rdcycle','rdcycleh','rdtime','rdtimeh','rdinstret','rdinstreth',
+        'fence','fence.i',
+        'ecall','ebreak',
+        'csrrw','csrrs','csrrc','csrrwi','csrrsi','csrrci',
         { 64-bit }
         'addiw','slliw','srliw','sraiw',
         'addw','sllw','srlw','subw','sraw',
@@ -85,7 +86,15 @@ unit itcpugas;
         'fcvt.w.d','fcvt.wu.d','fcvt.d.w','fcvt.d.wu',
         { 64-bit }
         'fcvt.l.d','fcvt.lu.d','fmv.x.d',
-        'fcvt.d.l','fcvt.d.lu','fmv.d.x');
+        'fcvt.d.l','fcvt.d.lu','fmv.d.x',
+
+        { Machine mode }
+        'mret','hret','sret','uret',
+        'wfi',
+
+        { Supervisor mode }
+        'sfence.vm'
+        );
 
     function gas_regnum_search(const s: string): Tregister;
     function gas_regname(r: Tregister): string;
diff --git a/riscv/trunk/compiler/systems.inc b/riscv/trunk/compiler/systems.inc
index 7af6f2935e..e30eeda4fc 100644
--- a/riscv/trunk/compiler/systems.inc
+++ b/riscv/trunk/compiler/systems.inc
@@ -175,7 +175,8 @@
              system_aarch64_linux,      { 88 }
              system_i8086_win16,        { 89 }
              system_riscv32_linux,      { 90 }
-             system_riscv64_linux       { 91 }
+             system_riscv64_linux,      { 91 }
+             system_riscv64_embedded    { 92 }
        );
 
      type
diff --git a/riscv/trunk/compiler/systems.pas b/riscv/trunk/compiler/systems.pas
index ed0fc878b1..28f4f1664b 100644
--- a/riscv/trunk/compiler/systems.pas
+++ b/riscv/trunk/compiler/systems.pas
@@ -230,7 +230,8 @@ interface
        systems_android = [system_arm_android, system_i386_android, system_mipsel_android];
        systems_linux = [system_i386_linux,system_x86_64_linux,system_powerpc_linux,system_powerpc64_linux,
                        system_arm_linux,system_sparc_linux,system_m68k_linux,
-                       system_x86_6432_linux,system_mipseb_linux,system_mipsel_linux,system_aarch64_linux];
+                       system_x86_6432_linux,system_mipseb_linux,system_mipsel_linux,system_aarch64_linux,
+                       system_riscv32_linux,system_riscv64_linux];
        systems_dragonfly = [system_x86_64_dragonfly];
        systems_freebsd = [system_i386_freebsd,
                           system_x86_64_freebsd];
@@ -271,7 +272,8 @@ interface
                            system_iA64_embedded,system_x86_64_embedded,
                            system_mips_embedded,system_arm_embedded,
                            system_powerpc64_embedded,system_avr_embedded,
-                           system_jvm_java32,system_mipseb_embedded,system_mipsel_embedded];
+                           system_jvm_java32,system_mipseb_embedded,system_mipsel_embedded,
+                           system_riscv64_embedded];
 
        { all systems that allow section directive }
        systems_allow_section = systems_embedded;
diff --git a/riscv/trunk/compiler/systems/i_embed.pas b/riscv/trunk/compiler/systems/i_embed.pas
index 0ed2dc0cf2..ce438c384a 100644
--- a/riscv/trunk/compiler/systems/i_embed.pas
+++ b/riscv/trunk/compiler/systems/i_embed.pas
@@ -346,7 +346,71 @@ unit i_embed;
             stackalign   : 16;
             abi : abi_default;
             llvmdatalayout : 'e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128';
-         );
+         );                           
+
+       system_riscv64_embedded_info : tsysteminfo =
+          (
+            system       : system_riscv64_embedded;
+            name         : 'Embedded';
+            shortname    : 'embedded';
+            flags        : [tf_needs_symbol_size,tf_needs_symbol_type,tf_files_case_sensitive,
+                            tf_smartlink_sections];
+            cpu          : cpu_riscv64;
+            unit_env     : '';
+            extradefines : '';
+            exeext       : '';
+            defext       : '.def';
+            scriptext    : '.sh';
+            smartext     : '.sl';
+            unitext      : '.ppu';
+            unitlibext   : '.ppl';
+            asmext       : '.s';
+            objext       : '.o';
+            resext       : '.res';
+            resobjext    : '.or';
+            sharedlibext : '.so';
+            staticlibext : '.a';
+            staticlibprefix : 'libp';
+            sharedlibprefix : 'lib';
+            sharedClibext : '.so';
+            staticClibext : '.a';
+            staticClibprefix : 'lib';
+            sharedClibprefix : 'lib';
+            importlibprefix : 'libimp';
+            importlibext : '.a';
+            Cprefix      : '';
+            newline      : #10;
+            dirsep       : '/';
+            assem        : as_gas;
+            assemextern  : as_gas;
+            link         : ld_none;
+            linkextern   : ld_embedded;
+            ar           : ar_gnu_ar;
+            res          : res_none;
+            dbg          : dbg_dwarf2;
+            script       : script_unix;
+            endian       : endian_little;
+            alignment    :
+              (
+                procalign       : 4;
+                loopalign       : 4;
+                jumpalign       : 0;
+                constalignmin   : 0;
+                constalignmax   : 4;
+                varalignmin     : 0;
+                varalignmax     : 4;
+                localalignmin   : 4;
+                localalignmax   : 8;
+                recordalignmin  : 0;
+                recordalignmax  : 8;
+                maxCrecordalign : 4
+              );
+            first_parm_offset : 0;
+            stacksize    : 262144;
+            stackalign   : 8;
+            abi : abi_default;
+            llvmdatalayout : 'e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64-S128';
+          );
 
   implementation
 
@@ -376,4 +440,9 @@ initialization
     set_source_info(system_x86_64_embedded_info);
   {$endif embedded}
 {$endif CPUX86_64}
+{$ifdef CPURISCV64}
+  {$ifdef embedded}
+    set_source_info(system_riscv64_embedded_info);
+  {$endif embedded}
+{$endif CPURISCV64}
 end.
diff --git a/riscv/trunk/compiler/systems/i_linux.pas b/riscv/trunk/compiler/systems/i_linux.pas
index 956c9b0740..1a3917bde4 100644
--- a/riscv/trunk/compiler/systems/i_linux.pas
+++ b/riscv/trunk/compiler/systems/i_linux.pas
@@ -1090,7 +1090,7 @@ unit i_linux;
             first_parm_offset : 8;
             stacksize    : 10*1024*1024;
             stackalign   : 16;
-            abi : abi_powerpc_sysv;
+            abi : abi_default;
             llvmdatalayout : 'E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-f128:64:64-v128:128:128-n32:64';
           );
 
diff --git a/riscv/trunk/compiler/systems/t_embed.pas b/riscv/trunk/compiler/systems/t_embed.pas
index 3db127f869..db197abe30 100644
--- a/riscv/trunk/compiler/systems/t_embed.pas
+++ b/riscv/trunk/compiler/systems/t_embed.pas
@@ -96,7 +96,7 @@ Var
 begin
   WriteResponseFile:=False;
   linklibc:=(SharedLibFiles.Find('c')<>nil);
-{$if defined(ARM) or defined(i386) or defined(x86_64) or defined(AVR) or defined(MIPSEL)}
+{$if defined(ARM) or defined(i386) or defined(x86_64) or defined(AVR) or defined(MIPSEL) or defined(RISCV32) or defined(RISCV64)}
   prtobj:='';
 {$else}
   prtobj:='prt0';
@@ -1224,7 +1224,44 @@ begin
       Add('}');
       Add('_end = .;');
     end;
-{$endif MIPSEL}
+{$endif MIPSEL}  
+
+{$ifdef riscv64}
+  with linkres do
+    begin
+      Add('ENTRY(_START)');
+      Add('SECTIONS');
+      Add('{');
+      Add('     . = 0x0;');
+      Add('     .text ALIGN (0x8) :');
+      Add('    {');
+      Add('    _text = .;');
+      Add('    KEEP(*(.init .init.*))');
+      Add('    *(.text .text.*)');
+      Add('    *(.strings)');
+      Add('    *(.rodata .rodata.*)');
+      Add('    *(.comment)');
+      Add('    _etext = .;');
+      Add('    }');
+      Add('    .data ALIGN (0x8) :');
+      Add('    {');
+      Add('    _data = .;');
+      Add('    *(.data .data.*)');
+      Add('    KEEP (*(.fpc .fpc.n_version .fpc.n_links))');
+      Add('    _edata = .;');
+      Add('    }');
+      Add('    . = ALIGN(4);');
+      Add('    .bss :');
+      Add('    {');
+      Add('    _bss_start = .;');
+      Add('    *(.bss .bss.*)');
+      Add('    *(COMMON)');
+      Add('    }');
+      Add('_bss_end = . ;');
+      Add('}');
+      Add('_end = .;');
+    end;
+{$endif riscv64}
 
 
   { Write and Close response }
@@ -1492,4 +1529,9 @@ initialization
   RegisterTarget(system_mipsel_embedded_info);
 {$endif mipsel}
 
+{$ifdef riscv64}
+  RegisterLinker(ld_embedded,TLinkerEmbedded);
+  RegisterTarget(system_riscv64_embedded_info);
+{$endif riscv64}
+
 end.
diff --git a/riscv/trunk/compiler/utils/ppuutils/ppudump.pp b/riscv/trunk/compiler/utils/ppuutils/ppudump.pp
index 5fc3dacaf4..99d3d6219e 100644
--- a/riscv/trunk/compiler/utils/ppuutils/ppudump.pp
+++ b/riscv/trunk/compiler/utils/ppuutils/ppudump.pp
@@ -177,7 +177,8 @@ const
   { 88 }  'Linux-AArch64',
   { 89 }  'Win16',
   { 90 }  'Linux-RiscV32',
-  { 91 }  'Linux-RiscV64'
+  { 91 }  'Linux-RiscV64',
+  { 92 }  'Embedded-RiscV64'
   );
 
 const
diff --git a/riscv/trunk/rtl/embedded/Makefile.fpc b/riscv/trunk/rtl/embedded/Makefile.fpc
index eca75e39ad..f253fea9bb 100644
--- a/riscv/trunk/rtl/embedded/Makefile.fpc
+++ b/riscv/trunk/rtl/embedded/Makefile.fpc
@@ -161,6 +161,10 @@ $(error No CPUs enabled for given SUBARCH, pass either a SUBARCH or set CPU_UNIT
 endif
 endif
 
+ifeq ($(ARCH),riscv64)
+CPU_SPECIFIC_COMMON_UNITS=sysutils math classes fgl macpas typinfo types rtlconsts getopts lineinfo
+endif
+
 # Paths
 OBJPASDIR=$(RTL)/objpas
 GRAPHDIR=$(INC)/graph
diff --git a/riscv/trunk/rtl/embedded/rtl.cfg b/riscv/trunk/rtl/embedded/rtl.cfg
index 952e376d2c..7b438d64b8 100644
--- a/riscv/trunk/rtl/embedded/rtl.cfg
+++ b/riscv/trunk/rtl/embedded/rtl.cfg
@@ -105,3 +105,21 @@
 -SfRANDOM
 -SfRESOURCES
 #endif CPUMIPSEL
+
+# RiscV 64 is powerful enough to handle most object pascal constructs
+# it is only a matter of size
+#ifdef CPURISCV64
+-SfSOFTFPU
+-SfCLASSES
+-SfEXCEPTIONS
+-SfANSISTRINGS
+-SfRTTI
+-SfWIDESTRINGS
+-SfDYNARRAYS
+-SfTHREADING
+-SfVARIANTS
+-SfOBJECTS
+-SfCOMMANDARGS
+-SfRANDOM
+-SfRESOURCES
+#endif CPURISCV64
diff --git a/riscv/trunk/utils/fpcm/fpcmmain.pp b/riscv/trunk/utils/fpcm/fpcmmain.pp
index d27a2e2abd..cbe7f93919 100644
--- a/riscv/trunk/utils/fpcm/fpcmmain.pp
+++ b/riscv/trunk/utils/fpcm/fpcmmain.pp
@@ -140,7 +140,7 @@ interface
         { wince    }( true,  false, false, false, false, true,  false, false, false, false, false, false, false, false,   false, false, false,  false,  false),
         { gba    }  ( false, false, false, false, false, true,  false, false, false, false, false, false, false, false,   false, false, false,  false,  false),
         { nds    }  ( false, false, false, false, false, true,  false, false, false, false, false, false, false, false,   false, false, false,  false,  false),
-        { embedded }( true,  true,  true,  true,  true,  true,  true,  true,  true , false, false, true , false, false,   false, false, false,  false,  false),
+        { embedded }( true,  true,  true,  true,  true,  true,  true,  true,  true , false, false, true , false, false,   false, false, false,  true ,  true ),
         { symbian } ( true,  false, false, false, false, true,  false, false, false, false, false, false, false, false,   false, false, false,  false,  false),
         { nativent }( true,  false, false, false, false, false, false, false, false, false, false, false, false, false,   false, false, false,  false,  false),
         { iphonesim }( true, false, false, false, true,  false, false, false, false, false, false, false, false, false,   false, false, false,  false,  false),