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author | tg74 <tg74@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2021-01-12 16:27:07 +0000 |
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committer | tg74 <tg74@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2021-01-12 16:27:07 +0000 |
commit | 531b9b117e45d37b0c2efc13a1e6c948294f7a3f (patch) | |
tree | 97cf03bbe64b1035171ec6699972db354f1de86d | |
parent | 010ad927221e42b37d45532539095680ac13d435 (diff) | |
download | fpc-531b9b117e45d37b0c2efc13a1e6c948294f7a3f.tar.gz |
cleanup
git-svn-id: https://svn.freepascal.org/svn/fpc/branches/tg74@48149 3ad0048d-3df7-0310-abae-a5850022a9f2
-rw-r--r-- | avx512-0037785/compiler/x86/rax86.pas | 32 |
1 files changed, 2 insertions, 30 deletions
diff --git a/avx512-0037785/compiler/x86/rax86.pas b/avx512-0037785/compiler/x86/rax86.pas index 5f06215607..0c077535c2 100644 --- a/avx512-0037785/compiler/x86/rax86.pas +++ b/avx512-0037785/compiler/x86/rax86.pas @@ -1682,21 +1682,11 @@ begin ; end; end; - //A_MOVSS, - //A_VMOVSS, A_MOVD : { movd is a move from a mmx register to a 32 bit register or memory, so no opsize is correct here PM } exit; A_MOVQ : opsize:=S_IQ; - //A_VCVTPD2DQ, - //A_VCVTPD2PS, - //A_VCVTTPD2DQ, - //A_VCVTPD2UDQ, - //A_VCVTQQ2PS, - //A_VCVTTPD2UDQ, - //A_VCVTUQQ2PS, - A_OUT : opsize:=tx86operand(operands[1]).opsize; else @@ -1704,26 +1694,8 @@ begin opsize:=tx86operand(operands[2]).opsize; end; end; - 3 : - begin - //case opcode of - //A_VCVTSI2SS, - //A_VCVTSI2SD, - //A_VCVTUSI2SS, - //A_VCVTUSI2SD: - // opsize:=tx86operand(operands[1]).opsize; - //A_VFPCLASSPD, - //A_VFPCLASSPS: - // iops:=tx86operand(operands[2]).opsize; - //else - begin - if not CheckSSEAVX then - opsize:=tx86operand(operands[ops]).opsize; - end; - //end; - end; - 4 : if not CheckSSEAVX then - opsize:=tx86operand(operands[ops]).opsize; + 3,4 : if not CheckSSEAVX then + opsize:=tx86operand(operands[ops]).opsize; end; end; |