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authortg74 <tg74@3ad0048d-3df7-0310-abae-a5850022a9f2>2020-12-29 04:49:52 +0000
committertg74 <tg74@3ad0048d-3df7-0310-abae-a5850022a9f2>2020-12-29 04:49:52 +0000
commit5f81f0a05a16b5d893ad42d85e509b39d672a69b (patch)
tree7ab9be154f90630e75fef141ba0dc8c117637c11
parent59effc00ff8ea2aed33b1be267379c320c5e9085 (diff)
downloadfpc-5f81f0a05a16b5d893ad42d85e509b39d672a69b.tar.gz
internal assembler-reader x86 opsize local/global var - cleanup
git-svn-id: https://svn.freepascal.org/svn/fpc/branches/tg74@47885 3ad0048d-3df7-0310-abae-a5850022a9f2
-rw-r--r--avx512-0037785/compiler/x86/aasmcpu.pas7
-rw-r--r--avx512-0037785/compiler/x86/rax86.pas39
-rw-r--r--avx512-0037785/tests/utils/avx/asmtestgenerator.pas12
3 files changed, 2 insertions, 56 deletions
diff --git a/avx512-0037785/compiler/x86/aasmcpu.pas b/avx512-0037785/compiler/x86/aasmcpu.pas
index bf48134dad..5e5cd3b769 100644
--- a/avx512-0037785/compiler/x86/aasmcpu.pas
+++ b/avx512-0037785/compiler/x86/aasmcpu.pas
@@ -1832,13 +1832,6 @@ implementation
if (insot and OT_SIZE_MASK) = 0 then
begin
case insot and (OT_XMMRM or OT_YMMRM or OT_ZMMRM or OT_REG_EXTRA_MASK) of
- //OT_XMMRM: if InsTabMemRefSizeInfoCache^[opcode].MemRefSize <> msiMultipleMinSize128
- // then insot := insot or OT_BITS128;
- //OT_YMMRM: if InsTabMemRefSizeInfoCache^[opcode].MemRefSize <> msiMultipleMinSize256
- // then insot := insot or OT_BITS256;
- //OT_ZMMRM: if InsTabMemRefSizeInfoCache^[opcode].MemRefSize <> msiMultipleMinSize512
- // then insot := insot or OT_BITS512;
-
OT_MEM128: insot := insot or OT_BITS128;
OT_MEM256: insot := insot or OT_BITS256;
OT_MEM512: insot := insot or OT_BITS512;
diff --git a/avx512-0037785/compiler/x86/rax86.pas b/avx512-0037785/compiler/x86/rax86.pas
index 3cbac44ed9..e2e0e1f0f3 100644
--- a/avx512-0037785/compiler/x86/rax86.pas
+++ b/avx512-0037785/compiler/x86/rax86.pas
@@ -868,7 +868,6 @@ begin
if memoffset = 0 then
begin
Message3(asmr_w_check_mem_operand_size3,
- //std_op2str[opcode],
getstring(false),
ToStr(memopsize),
ToStr(memrefsize)
@@ -877,7 +876,6 @@ begin
else
begin
Message4(asmr_w_check_mem_operand_size_offset,
- //std_op2str[opcode],
getstring(false),
ToStr(memopsize),
ToStr(memrefsize),
@@ -2106,43 +2104,6 @@ begin
if asize<>0 then
ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
end;
-
- // if MemRefInfo(opcode).ExistsSSEAVX then
- // begin
- // asize := 0;
- //
- // case operands[i].size of
- // OS_32,OS_M32: if (operands[i].HasType) or
- // (MemRefInfo(opcode).MemRefSize = msiMem32) or
- // (MemRefInfo(opcode).MemRefSizeBCST = msbBCST32)
- // //(((tx86operand(operands[i]).vopext and OTVE_VECTOR_BCST) = OTVE_VECTOR_BCST) and
- // // (MemRefInfo(opcode).MemRefSizeBCST = msbBCST32)
- // //)
- // then
- // asize:=OT_BITS32;
- // OS_64,OS_M64: if (operands[i].HasType) or
- // (MemRefInfo(opcode).MemRefSizeBCST = msbBCST64)
- // (MemRefInfo(opcode).MemRefSize = msiMem64) or
- // //(((tx86operand(operands[i]).vopext and OTVE_VECTOR_BCST) = OTVE_VECTOR_BCST) and
- // // (MemRefInfo(opcode).MemRefSizeBCST = msbBCST64)
- // //) then
- // (MemRefInfo(opcode).MemRefSizeBCST = msbBCST64) then
- // asize:=OT_BITS64;
- // OS_M128: if (operands[i].HasType) or
- // (MemRefInfo(opcode).MemRefSize = msiMem128) then
- // //asize:=OT_BITS128;
- // OS_M256: if (operands[i].HasType) or
- // (MemRefInfo(opcode).MemRefSize = msiMem256) then
- // //asize:=OT_BITS256;
- // OS_M512: if (operands[i].HasType) or
- // (MemRefInfo(opcode).MemRefSize = msiMem512) then
- // //asize:=OT_BITS512;
- // else;
- // end;
- //
- // if asize<>0 then
- // ai.oper[i-1]^.ot:=(ai.oper[i-1]^.ot and not OT_SIZE_MASK) or asize;
- // end;
end;
OPR_REFERENCE:
begin
diff --git a/avx512-0037785/tests/utils/avx/asmtestgenerator.pas b/avx512-0037785/tests/utils/avx/asmtestgenerator.pas
index b842756266..055aa37c72 100644
--- a/avx512-0037785/tests/utils/avx/asmtestgenerator.pas
+++ b/avx512-0037785/tests/utils/avx/asmtestgenerator.pas
@@ -1253,19 +1253,11 @@ begin
;
- MaskRegNeeded := (Uppercase(aInst) = 'VGATHERDPD') or
- (Uppercase(aInst) = 'VGATHERDPS') or
- (Uppercase(aInst) = 'VGATHERDQPD') or
- (Uppercase(aInst) = 'VGATHERDQPS') or
- (Uppercase(aInst) = 'VPGATHERDD') or
- (Uppercase(aInst) = 'VPGATHERDQ') or
- (Uppercase(aInst) = 'VPGATHERQD') or
- (Uppercase(aInst) = 'VPGATHERQQ') or
+ MaskRegNeeded := (Pos('VGATHER', Uppercase(aInst)) = 1) or
+ (Pos('VPGATHER', Uppercase(aInst)) = 1) or
(Pos('VPSCATTER', Uppercase(aInst)) = 1) or
(Pos('VSCATTER', Uppercase(aInst)) = 1);
-
-
for il_Op := 1 to 4 do
begin
sl_Prefix := '';