* AArch64: fix storing a 32 bit value in the lower 32 bits of a 64 bit

    subsetreg (mantis #38766)

git-svn-id: https://svn.freepascal.org/svn/fpc/trunk@49236 3ad0048d-3df7-0310-abae-a5850022a9f2

2 files changed, 30 insertions, 1 deletions

diff --git a/compiler/aarch64/hlcgcpu.pas b/compiler/aarch64/hlcgcpu.pas
index 593c202ef8..9de4e55ad7 100644
--- a/compiler/aarch64/hlcgcpu.pas
+++ b/compiler/aarch64/hlcgcpu.pas
@@ -210,7 +210,8 @@ implementation
       if slopt in [SL_SETZERO,SL_SETMAX] then
         inherited
       else if not(sreg.bitlen in [32,64]) or
-              (sreg.startbit<>0) then
+              (sreg.startbit<>0) or
+              (getsubreg(fromreg)<getsubreg(sreg.subsetreg)) then
         begin
           makeregssamesize(list,def_cgsize(fromsize),sreg.subsetregsize,fromreg,sreg.subsetreg,fromreg,toreg);
           list.concat(taicpu.op_reg_reg_const_const(A_BFI,toreg,fromreg,sreg.startbit,sreg.bitlen))
diff --git a/tests/webtbs/tw38766.pp b/tests/webtbs/tw38766.pp
new file mode 100644
index 0000000000..7393d00f91
--- /dev/null
+++ b/tests/webtbs/tw38766.pp
@@ -0,0 +1,28 @@
+{$mode objfpc}
+
+type
+  trec = record
+    x, y: longint;
+  end;
+
+function max(x,y: longint): longint;
+begin
+  if x>y then
+    result:=x
+  else
+    result:=y;
+end;
+
+function test: trec; inline;
+begin
+ result.x:=1;
+ result.y:=2;
+ result.x:=max(result.x,result.y);
+end;
+    
+begin
+  if test.x<>2 then
+    halt(1);
+  if test.y<>2 then
+    halt(2);
+end.