summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authornickysn <nickysn@3ad0048d-3df7-0310-abae-a5850022a9f2>2020-04-26 20:58:52 +0000
committernickysn <nickysn@3ad0048d-3df7-0310-abae-a5850022a9f2>2020-04-26 20:58:52 +0000
commit1014192338d347054d25304577152abf422af7ca (patch)
treecbb6077adf2caa121fd29b6aa7ab7df768d1d19f
parent0e1afc3bfb80c73a9ef6a1ccb2443507f3af1ba7 (diff)
downloadfpc-1014192338d347054d25304577152abf422af7ca.tar.gz
* generate better code in tcgz80.a_loadaddr_ref_reg
git-svn-id: https://svn.freepascal.org/svn/fpc/branches/z80@45125 3ad0048d-3df7-0310-abae-a5850022a9f2
-rw-r--r--compiler/z80/cgcpu.pas12
1 files changed, 7 insertions, 5 deletions
diff --git a/compiler/z80/cgcpu.pas b/compiler/z80/cgcpu.pas
index 12d1f34f36..70b4781a3e 100644
--- a/compiler/z80/cgcpu.pas
+++ b/compiler/z80/cgcpu.pas
@@ -2287,14 +2287,16 @@ unit cgcpu;
if (ref.index<>NR_NO) then
a_op_reg_reg(list,OP_ADD,OS_16,ref.index,r);
end
- else
+ else if ref.base<>NR_NO then
begin
- a_load_const_reg(list,OS_16,ref.offset,r);
- if (ref.base<>NR_NO) then
- a_op_reg_reg(list,OP_ADD,OS_16,ref.base,r);
+ a_op_const_reg_reg(list,OP_ADD,OS_16,ref.offset,ref.base,r);
if (ref.index<>NR_NO) then
a_op_reg_reg(list,OP_ADD,OS_16,ref.index,r);
- end;
+ end
+ else if ref.index<>NR_NO then
+ a_op_const_reg_reg(list,OP_ADD,OS_16,ref.offset,ref.index,r)
+ else
+ a_load_const_reg(list,OS_16,ref.offset,r);
end;