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author | florian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2020-04-24 20:56:56 +0000 |
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committer | florian <florian@3ad0048d-3df7-0310-abae-a5850022a9f2> | 2020-04-24 20:56:56 +0000 |
commit | 7b837afb4d574a55b0b065f5262a13ecce7701b9 (patch) | |
tree | e8cdc0bc3239966fc16b8278505e8ba88a8c2bdb | |
parent | e51b1f8903aff0de5118b3dcc3bc066dd5385c12 (diff) | |
download | fpc-7b837afb4d574a55b0b065f5262a13ecce7701b9.tar.gz |
+ assembler optimization MovxMov2Movx
git-svn-id: https://svn.freepascal.org/svn/fpc/trunk@45057 3ad0048d-3df7-0310-abae-a5850022a9f2
-rw-r--r-- | compiler/x86/aoptx86.pas | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/compiler/x86/aoptx86.pas b/compiler/x86/aoptx86.pas index 3b2ce0fdce..569aa86c23 100644 --- a/compiler/x86/aoptx86.pas +++ b/compiler/x86/aoptx86.pas @@ -5203,6 +5203,40 @@ unit aoptx86; hp2.free; p:=hp1; end + else if reg_and_hp1_is_instr and + (taicpu(hp1).opcode = A_MOV) and + MatchOpType(taicpu(hp1),top_reg,top_reg) and + (MatchOperand(taicpu(p).oper[1]^,taicpu(hp1).oper[0]^) +{$ifdef x86_64} + { check for implicit extension to 64 bit } + or + ((taicpu(p).opsize in [S_BL,S_WL]) and + (taicpu(hp1).opsize=S_Q) and + SuperRegistersEqual(taicpu(p).oper[1]^.reg,taicpu(hp1).oper[0]^.reg) + ) +{$endif x86_64} + ) + then + begin + { change + movx %reg1,%reg2 + mov %reg2,%reg3 + dealloc %reg2 + + into + + movx %reg,%reg3 + } + TransferUsedRegs(TmpUsedRegs); + UpdateUsedRegs(TmpUsedRegs, tai(p.next)); + if not(RegUsedAfterInstruction(taicpu(p).oper[1]^.reg,hp1,TmpUsedRegs)) then + begin + DebugMsg(SPeepholeOptimization + 'MovxMov2Movx',p); + taicpu(p).loadreg(1,taicpu(hp1).oper[1]^.reg); + asml.remove(hp1); + hp1.Free; + end; + end else if taicpu(p).opcode=A_MOVZX then begin { removes superfluous And's after movzx's } |